{ | |
"area": 38.3616, | |
"cell_footprint": "dfrbp", | |
"cell_leakage_power": 0.0, | |
"driver_waveform_fall": "ramp", | |
"driver_waveform_rise": "ramp", | |
"ff IQ,IQ_N": { | |
"clear": "!RESET_B", | |
"clocked_on": "CLK", | |
"next_state": "D" | |
}, | |
"pg_pin VGND": { | |
"pg_type": "primary_ground", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin VNB": { | |
"pg_type": "primary_ground", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin VPB": { | |
"pg_type": "primary_power", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin VPWR": { | |
"pg_type": "primary_power", | |
"voltage_name": "VPWR" | |
}, | |
"pin CLK": { | |
"capacitance": 0.00229, | |
"clock": "true", | |
"direction": "input", | |
"fall_capacitance": 0.002178, | |
"internal_power": { | |
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"min_pulse_width_low": 1.345213, | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
"rise_capacitance": 0.002402 | |
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"clock": "false", | |
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"internal_power": { | |
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} | |
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"function": "IQ", | |
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"max_transition": 1.0, | |
"power_down_function": "(!VPWR + VGND)", | |
"related_ground_pin": "VGND", | |
"related_power_pin": "VPWR", | |
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{ | |
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