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| "area": 27.1728, | |
| "cell_footprint": "a22oi", | |
| "cell_leakage_power": 0.0, | |
| "pg_pin VGND": { | |
| "pg_type": "primary_ground", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin VNB": { | |
| "pg_type": "primary_ground", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin VPB": { | |
| "pg_type": "primary_power", | |
| "voltage_name": "VPB" | |
| }, | |
| "pg_pin VPWR": { | |
| "pg_type": "primary_power", | |
| "voltage_name": "VPWR" | |
| }, | |
| "pin A1": { | |
| "capacitance": 0.01141, | |
| "clock": "false", | |
| "direction": "input", | |
| "internal_power": { | |
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| }, | |
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| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR" | |
| }, | |
| "pin A2": { | |
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| "internal_power": { | |
| "fall_power hidden_pwr_template13": { | |
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| }, | |
| "max_transition": 1.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR" | |
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| "pin B2": { | |
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| "internal_power": { | |
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| }, | |
| "max_transition": 1.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR" | |
| }, | |
| "pin Y": { | |
| "direction": "output", | |
| "function": "(!A1&!B1) | (!A1&!B2) | (!A2&!B1) | (!A2&!B2)", | |
| "internal_power": [ | |
| { | |
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| "when": "(A2&!B1) | (A2&!B2)" | |
| }, | |
| { | |
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