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| "pin GCLK": { |
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| }, |
| "timing_sense": "positive_unate" |
| } |
| }, |
| "pin M0": { |
| "direction": "internal", |
| "internal_node": "m0" |
| }, |
| "statetable \"CLK GATE\",\"M0\"": { |
| "table": "L L : - : L ,L H : - : H ,H - : - : N" |
| } |
| } |
