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| "area": 12.7872, |
| "cell_footprint": "a21bo", |
| "cell_leakage_power": 0.0, |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
| "pin A1": { |
| "capacitance": 0.00276, |
| "clock": "false", |
| "direction": "input", |
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| 0.00738, |
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| 0.00955 |
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| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin A2": { |
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| "clock": "false", |
| "direction": "input", |
| "internal_power": { |
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| 0.00964 |
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| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin B1_N": { |
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| 0.01791, |
| 0.01794, |
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| 0.0221, |
| 0.02316 |
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| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin X": { |
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| "function": "(A1&A2) | (!B1_N)", |
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| }, |
| { |
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| "sdf_cond": "(A1&!A2)", |
| "timing_sense": "negative_unate", |
| "when": "(A1&!A2)" |
| } |
| ] |
| } |
| } |
