| { |
| "area": 25.5744, |
| "cell_footprint": "sky130_fd_sc_ms__dlclkp", |
| "cell_leakage_power": 44.17933, |
| "clock_gating_integrated_cell": "latch_posedge", |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "leakage_power": [ |
| { |
| "value": 38.7251191, |
| "when": "!GATE&CLK" |
| }, |
| { |
| "value": 40.5479028, |
| "when": "GATE&!CLK" |
| }, |
| { |
| "value": 34.1735458, |
| "when": "GATE&CLK" |
| }, |
| { |
| "value": 44.179334, |
| "when": "!GATE&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.013, |
| "clock": "true", |
| "clock_gate_clock_pin": "true", |
| "direction": "input", |
| "internal_power": { |
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| }, |
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| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "min_pulse_width_low": 0.09577, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin,GATE": { |
| "capacitance": 0.00283, |
| "clock": "false", |
| "clock_gate_enable_pin": "true", |
| "direction": "input", |
| "internal_power": { |
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| 0.0390622, |
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| }, |
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| 0.0400423, |
| 0.0520243, |
| 0.0700113 |
| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
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| [ |
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| 0.39806, |
| 0.4215, |
| 0.43908, |
| 0.46837, |
| 0.49181 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,sethold_template_rise10x10": { |
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| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
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| 0.75, |
| 1.0, |
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| 1.5 |
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| 0.25, |
| 0.5, |
| 0.75, |
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| ], |
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| [ |
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| ] |
| ] |
| }, |
| "timing_type": "setup_rising" |
| }, |
| { |
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| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
| 1.5 |
| ], |
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| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
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| [ |
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| [ |
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| [ |
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| -0.40467 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,sethold_template_rise10x10": { |
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| 0.01, |
| 0.03125, |
| 0.0625, |
| 0.125, |
| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
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| 0.25, |
| 0.5, |
| 0.75, |
| 1.0, |
| 1.25, |
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| ], |
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| [ |
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| [ |
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| ] |
| }, |
| "timing_type": "hold_rising" |
| } |
| ] |
| }, |
| "pin,GCLK": { |
| "clock_gate_out_pin": "true", |
| "direction": "output", |
| "internal_power": { |
| "fall_power,pwr_template13x12": { |
| "index_1": [ |
| 0.01, |
| 0.01735, |
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| 0.03903, |
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| 0.13172, |
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| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1, |
| 1.5 |
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| "index_2": [ |
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| 0.23231, |
| 0.34087, |
| 0.50649, |
| 0.7569 |
| ], |
| [ |
| 0.0325, |
| 0.0512, |
| 0.0578, |
| 0.0666, |
| 0.0786, |
| 0.0961, |
| 0.1233, |
| 0.1664, |
| 0.2354, |
| 0.3433, |
| 0.5074, |
| 0.7571 |
| ], |
| [ |
| 0.0404, |
| 0.0606, |
| 0.0677, |
| 0.077, |
| 0.0893, |
| 0.1067, |
| 0.1332, |
| 0.1747, |
| 0.2419, |
| 0.3477, |
| 0.5106, |
| 0.7576 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_transition,delay_template13x12": { |
| "index_1": [ |
| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
| "index_2": [ |
| 0.0, |
| 0.00836, |
| 0.01254, |
| 0.01881, |
| 0.02821, |
| 0.04231, |
| 0.06347, |
| 0.09521, |
| 0.14281, |
| 0.21422, |
| 0.32133, |
| 0.482 |
| ], |
| "values": [ |
| [ |
| 0.01205, |
| 0.03777, |
| 0.0498, |
| 0.06815, |
| 0.09638, |
| 0.1389, |
| 0.20433, |
| 0.30137, |
| 0.44905, |
| 0.66845, |
| 0.99898, |
| 1.49716 |
| ], |
| [ |
| 0.01205, |
| 0.03777, |
| 0.04983, |
| 0.06817, |
| 0.09619, |
| 0.13901, |
| 0.2037, |
| 0.30133, |
| 0.4483, |
| 0.6682, |
| 0.99888, |
| 1.49561 |
| ], |
| [ |
| 0.01207, |
| 0.03784, |
| 0.04989, |
| 0.06833, |
| 0.09616, |
| 0.13895, |
| 0.20374, |
| 0.30153, |
| 0.44882, |
| 0.66862, |
| 1.00049, |
| 1.49723 |
| ], |
| [ |
| 0.01208, |
| 0.03783, |
| 0.04995, |
| 0.06821, |
| 0.09638, |
| 0.13906, |
| 0.20389, |
| 0.3013, |
| 0.44875, |
| 0.66982, |
| 1.00063, |
| 1.49978 |
| ], |
| [ |
| 0.01234, |
| 0.03797, |
| 0.04999, |
| 0.06826, |
| 0.09631, |
| 0.13906, |
| 0.20388, |
| 0.30235, |
| 0.44914, |
| 0.66908, |
| 1.00111, |
| 1.49811 |
| ], |
| [ |
| 0.01285, |
| 0.03859, |
| 0.05062, |
| 0.06882, |
| 0.09669, |
| 0.13913, |
| 0.20373, |
| 0.30157, |
| 0.44837, |
| 0.67045, |
| 1.002, |
| 1.49537 |
| ], |
| [ |
| 0.01369, |
| 0.03965, |
| 0.05157, |
| 0.06947, |
| 0.09726, |
| 0.13944, |
| 0.2039, |
| 0.30186, |
| 0.44828, |
| 0.66884, |
| 1.00081, |
| 1.4957 |
| ], |
| [ |
| 0.01507, |
| 0.04118, |
| 0.05296, |
| 0.07077, |
| 0.09816, |
| 0.14034, |
| 0.20422, |
| 0.302, |
| 0.44829, |
| 0.66879, |
| 0.99941, |
| 1.49434 |
| ], |
| [ |
| 0.01706, |
| 0.04351, |
| 0.05522, |
| 0.07286, |
| 0.09972, |
| 0.14148, |
| 0.20523, |
| 0.30258, |
| 0.44847, |
| 0.66974, |
| 1.00064, |
| 1.494 |
| ], |
| [ |
| 0.01989, |
| 0.04672, |
| 0.05852, |
| 0.07599, |
| 0.10275, |
| 0.14373, |
| 0.20697, |
| 0.30347, |
| 0.44922, |
| 0.66934, |
| 1.00008, |
| 1.4941 |
| ], |
| [ |
| 0.02383, |
| 0.05092, |
| 0.06312, |
| 0.08069, |
| 0.10719, |
| 0.1482, |
| 0.21102, |
| 0.30651, |
| 0.45165, |
| 0.67115, |
| 0.99946, |
| 1.49973 |
| ], |
| [ |
| 0.02906, |
| 0.05636, |
| 0.06893, |
| 0.08693, |
| 0.11353, |
| 0.15451, |
| 0.21724, |
| 0.31275, |
| 0.45798, |
| 0.6744, |
| 1.0026, |
| 1.4951 |
| ], |
| [ |
| 0.0362, |
| 0.0636, |
| 0.0765, |
| 0.0952, |
| 0.1224, |
| 0.1631, |
| 0.2261, |
| 0.322, |
| 0.4669, |
| 0.6837, |
| 1.0092, |
| 1.4991 |
| ] |
| ] |
| }, |
| "timing_sense": "positive_unate" |
| } |
| }, |
| "pin,M0": { |
| "direction": "internal", |
| "internal_node": "M0", |
| "related_ground_pin": "VNB", |
| "related_power_pin": "VPWR" |
| }, |
| "statetable,CLK GATE,M0": { |
| "table": [ |
| "L L : - : L", |
| "L H : - : H", |
| "H - : - : N" |
| ] |
| } |
| } |
