| { |
| "area": 55.944, |
| "cell_footprint": "sky130_fd_sc_ls__sedfxtp", |
| "cell_leakage_power": 0.04476011, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&DE&!SCE) | (IQ&!DE&!SCE) | (SCD&SCE)" |
| }, |
| "leakage_power": [ |
| { |
| "value": 0.0465081, |
| "when": "!D&!SCE&!SCD&CLK" |
| }, |
| { |
| "value": 0.0438055, |
| "when": "D&!SCE&!SCD&CLK" |
| }, |
| { |
| "value": 0.0466611, |
| "when": "D&SCE&!SCD&CLK" |
| }, |
| { |
| "value": 0.0438315, |
| "when": "D&!SCE&SCD&CLK" |
| }, |
| { |
| "value": 0.0413124, |
| "when": "D&!SCE&!SCD&!CLK" |
| }, |
| { |
| "value": 0.0470902, |
| "when": "!D&SCE&!SCD&CLK" |
| }, |
| { |
| "value": 0.0443616, |
| "when": "!D&!SCE&SCD&CLK" |
| }, |
| { |
| "value": 0.0415911, |
| "when": "!D&!SCE&!SCD&!CLK" |
| }, |
| { |
| "value": 0.0469602, |
| "when": "!D&SCE&SCD&CLK" |
| }, |
| { |
| "value": 0.0443094, |
| "when": "!D&SCE&!SCD&!CLK" |
| }, |
| { |
| "value": 0.0496563, |
| "when": "D&SCE&SCD&CLK" |
| }, |
| { |
| "value": 0.0470055, |
| "when": "D&SCE&!SCD&!CLK" |
| }, |
| { |
| "value": 0.0413124, |
| "when": "D&!SCE&SCD&!CLK" |
| }, |
| { |
| "value": 0.0463041, |
| "when": "!D&SCE&SCD&!CLK" |
| }, |
| { |
| "value": 0.0438544, |
| "when": "D&SCE&SCD&!CLK" |
| }, |
| { |
| "value": 0.0415981, |
| "when": "!D&!SCE&SCD&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.002283, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.00218, |
| "internal_power": { |
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| 0.0333333, |
| 0.0578333, |
| 0.0867333, |
| 0.1301, |
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| 0.292733, |
| 0.4390667, |
| 0.658567, |
| 0.9878, |
| 1.48163, |
| 2.22233, |
| 3.33333, |
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| ], |
| "values": [ |
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| 0.0125779, |
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| 0.0149019, |
| 0.0148039, |
| 0.0147804, |
| 0.0147451, |
| 0.0146923, |
| 0.0146131 |
| ] |
| }, |
| "rise_power,hidden_pwr_template13": { |
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| ], |
| "values": [ |
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| 0.0121535, |
| 0.0121151, |
| 0.0120576, |
| 0.0119713, |
| 0.011842 |
| ] |
| } |
| }, |
| "max_transition": 5.0, |
| "min_pulse_width_high": 1.633182, |
| "min_pulse_width_low": 1.938597, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002386 |
| }, |
| "pin,D": { |
| "capacitance": 0.001681, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.001608, |
| "internal_power": { |
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| 2.22233, |
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| ], |
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| 0.0029567, |
| 0.0034705, |
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| 0.005279, |
| 0.0068352, |
| 0.0075408, |
| 0.0085992, |
| 0.008596, |
| 0.0085909, |
| 0.0085835, |
| 0.0085723 |
| ] |
| }, |
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| ], |
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| 0.0067449, |
| 0.0067219, |
| 0.0066874, |
| 0.0066358 |
| ] |
| } |
| }, |
| "max_transition": 5.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001754, |
| "timing": [ |
| { |
| "clk_width": 3.4e-08, |
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| 3.3333334, |
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| ], |
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| ], |
| "values": [ |
| [ |
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| 3.4952182, |
| 3.5573385, |
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| ], |
| [ |
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| 3.5101653, |
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| 4.3859519, |
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| 5.4091725, |
| 5.9207828, |
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| ], |
| [ |
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| 4.3213902, |
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| ], |
| [ |
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| 3.2555807, |
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| 4.1922668, |
| 4.7026563, |
| 5.2154874, |
| 5.7270977, |
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| ], |
| [ |
| 2.9806784, |
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| 3.9559931, |
| 4.4663826, |
| 4.9792133, |
| 5.4908236, |
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| ], |
| [ |
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| 4.5506113, |
| 5.0658835, |
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| ], |
| [ |
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| 2.207268, |
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| 2.3875251, |
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| [ |
| 1.8218243, |
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| 4.3283078, |
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| [ |
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| 1.5295065, |
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| 1.9545825, |
| 2.4649718, |
| 2.9741408, |
| 3.4869716, |
| 3.9985822, |
| 4.5126336 |
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| [ |
| 1.1867874, |
| 1.224195, |
| 1.2838739, |
| 1.4044523, |
| 1.6541539, |
| 2.1584399, |
| 2.6700502, |
| 3.1779981, |
| 3.6896087, |
| 4.2061015 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_10_10_1": { |
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| 0.0333333, |
| 0.1041667, |
| 0.2083333, |
| 0.4166667, |
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| 2.5, |
| 3.3333334, |
| 4.1666666, |
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| ], |
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| [ |
| 0.9614726, |
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| 2.294589, |
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| 3.1286005, |
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| [ |
| 0.9191821, |
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| 1.0211515, |
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| 2.2535192, |
| 2.6784595, |
| 3.0875307, |
| 3.483174 |
| ], |
| [ |
| 0.8582825, |
| 0.9005731, |
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| 2.1913989, |
| 2.6175598, |
| 3.0266312, |
| 3.4222745 |
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| [ |
| 0.7596769, |
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| 2.0915725, |
| 2.5165128, |
| 2.9243635, |
| 3.3200068 |
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| [ |
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| 0.6584669, |
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| 2.3669087, |
| 2.7710972, |
| 3.1630785 |
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| [ |
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| 2.5231588, |
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| [ |
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| [ |
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| 2.1174785 |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "clk_width": 3.4e-08, |
| "fall_constraint,vio_10_10_1": { |
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| 0.0333333, |
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| [ |
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| [ |
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| [ |
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| [ |
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| -3.4158331, |
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| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_10_10_1": { |
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| 0.0333333, |
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| }, |
| { |
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| [ |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "test_cell": { |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&DE) | (IQ&!DE)" |
| }, |
| "pin,CLK": { |
| "direction": "input" |
| }, |
| "pin,D": { |
| "direction": "input" |
| }, |
| "pin,DE": { |
| "direction": "input" |
| }, |
| "pin,Q": { |
| "direction": "output", |
| "function": "IQ", |
| "signal_type": "test_scan_out" |
| }, |
| "pin,SCD": { |
| "direction": "input", |
| "signal_type": "test_scan_in" |
| }, |
| "pin,SCE": { |
| "direction": "input", |
| "signal_type": "test_scan_enable" |
| } |
| } |
| } |
