| { |
| "area": 41.5584, |
| "cell_footprint": "sky130_fd_sc_ls__sdfxbp", |
| "cell_leakage_power": 15.01112, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&!SCE) | (SCD&SCE)" |
| }, |
| "leakage_power": [ |
| { |
| "value": 17.1887908, |
| "when": "D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 14.976294, |
| "when": "!D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 14.4966332, |
| "when": "!D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 14.7946526, |
| "when": "!D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 14.2685188, |
| "when": "!D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 15.692267, |
| "when": "D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 12.6489956, |
| "when": "D&SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 14.1481848, |
| "when": "!D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 13.6207587, |
| "when": "D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 12.1464883, |
| "when": "D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 13.3431763, |
| "when": "D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 17.9938748, |
| "when": "!D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 15.8267639, |
| "when": "!D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 17.4664905, |
| "when": "D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 16.218765, |
| "when": "D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 15.3472115, |
| "when": "!D&SCD&!SCE&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.002713, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.002597, |
| "internal_power": { |
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| 1.48163, |
| 2.22233, |
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| ], |
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| 0.0159798, |
| 0.0159799, |
| 0.0159958 |
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| }, |
| "rise_power,hidden_pwr_template13": { |
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| 0.0113315, |
| 0.0113051 |
| ] |
| } |
| }, |
| "max_transition": 5.0, |
| "min_pulse_width_high": 0.363145, |
| "min_pulse_width_low": 0.886036, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.00283 |
| }, |
| "pin,D": { |
| "capacitance": 0.001783, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.001697, |
| "internal_power": { |
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| 0.0054441, |
| 0.0054318, |
| 0.0054285 |
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| 0.0008226, |
| 0.0007806 |
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| }, |
| "max_transition": 5.0, |
| "nextstate_type": "data", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001869, |
| "timing": [ |
| { |
| "clk_width": 6.8e-08, |
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| [ |
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| 0.857306, |
| 1.2212111, |
| 1.5570402, |
| 1.8708966 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
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| 0.0333333, |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "clk_width": 6.8e-08, |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_10_10_1": { |
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| 0.8333333, |
| 1.6666667, |
| 2.5, |
| 3.3333334, |
| 4.1666666, |
| 5.0 |
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| "values": [ |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "test_cell": { |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "D" |
| }, |
| "pin,CLK": { |
| "direction": "input" |
| }, |
| "pin,D": { |
| "direction": "input" |
| }, |
| "pin,Q": { |
| "direction": "output", |
| "function": "IQ", |
| "signal_type": "test_scan_out" |
| }, |
| "pin,Q_N": { |
| "direction": "output", |
| "function": "IQ_N", |
| "signal_type": "test_scan_out_inverted" |
| }, |
| "pin,SCD": { |
| "direction": "input", |
| "signal_type": "test_scan_in" |
| }, |
| "pin,SCE": { |
| "direction": "input", |
| "signal_type": "test_scan_enable" |
| } |
| } |
| } |
