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| "area": 15.984, | |
| "cell_footprint": "sky130_fd_sc_ls__a222o", | |
| "cell_leakage_power": 0.0, | |
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| "voltage_name": "VGND" | |
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| "pg_pin,VNB": { | |
| "pg_type": "nwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin,VPB": { | |
| "pg_type": "pwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VPB" | |
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| "related_bias_pin": "VNB", | |
| "voltage_name": "VPWR" | |
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| 0.00415 | |
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| } | |
| }, | |
| "max_transition": 1.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR" | |
| }, | |
| "pin,A2": { | |
| "capacitance": 0.00269, | |
| "clock": "false", | |
| "direction": "input", | |
| "internal_power": { | |
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| }, | |
| "max_transition": 1.0, | |
| "related_ground_pin": "VGND", | |
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| }, | |
| "pin,B1": { | |
| "capacitance": 0.00303, | |
| "clock": "false", | |
| "direction": "input", | |
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| }, | |
| "max_transition": 1.0, | |
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| "related_power_pin": "VPWR" | |
| }, | |
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| "direction": "input", | |
| "internal_power": { | |
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| 0.00288 | |
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| }, | |
| "max_transition": 1.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR" | |
| }, | |
| "pin,C1": { | |
| "capacitance": 0.00296, | |
| "clock": "false", | |
| "direction": "input", | |
| "internal_power": { | |
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| }, | |
| "max_transition": 1.0, | |
| "related_ground_pin": "VGND", | |
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| }, | |
| "pin,C2": { | |
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| 0.0038 | |
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| }, | |
| "max_transition": 1.0, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR" | |
| }, | |
| "pin,X": { | |
| "direction": "output", | |
| "function": "(C1&C2) | (B1&B2) | (A1&A2)", | |
| "internal_power": [ | |
| { | |
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| "related_pin": "A1", | |
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| "when": "(A2&!B1&!C1) | (A2&!B1&!C2) | (A2&!B2&!C1) | (A2&!B2&!C2)" | |
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| { | |
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