{
  "area": 41.5584,
  "cell_footprint": "sdfxtp",
  "cell_leakage_power": 0.03861429,
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "ff IQ,IQ_N": {
    "clocked_on": "CLK",
    "next_state": "(D&!SCE) | (SCD&SCE)"
  },
  "leakage_power": [
    {
      "value": 0.0375899,
      "when": "D&SCD&!SCE&CLK"
    },
    {
      "value": 0.0378271,
      "when": "D&!SCD&!SCE&!CLK"
    },
    {
      "value": 0.0407377,
      "when": "!D&SCD&SCE&CLK"
    },
    {
      "value": 0.0385013,
      "when": "!D&!SCD&SCE&!CLK"
    },
    {
      "value": 0.0384086,
      "when": "D&SCD&SCE&CLK"
    },
    {
      "value": 0.0412441,
      "when": "D&!SCD&SCE&!CLK"
    },
    {
      "value": 0.0357697,
      "when": "!D&SCD&!SCE&!CLK"
    },
    {
      "value": 0.0360581,
      "when": "D&!SCD&!SCE&CLK"
    },
    {
      "value": 0.0387428,
      "when": "!D&!SCD&SCE&CLK"
    },
    {
      "value": 0.0360112,
      "when": "!D&SCD&!SCE&CLK"
    },
    {
      "value": 0.0357519,
      "when": "!D&!SCD&!SCE&!CLK"
    },
    {
      "value": 0.0375913,
      "when": "!D&!SCD&!SCE&CLK"
    },
    {
      "value": 0.0430835,
      "when": "D&!SCD&SCE&CLK"
    },
    {
      "value": 0.0378271,
      "when": "D&SCD&!SCE&!CLK"
    },
    {
      "value": 0.0425066,
      "when": "!D&SCD&SCE&!CLK"
    },
    {
      "value": 0.0401775,
      "when": "D&SCD&SCE&!CLK"
    }
  ],
  "pg_pin VGND": {
    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
  "pin CLK": {
    "capacitance": 0.002328,
    "clock": "true",
    "direction": "input",
    "fall_capacitance": 0.002202,
    "internal_power": {
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        "index_1": [
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          0.0578333,
          0.0867333,
          0.1301,
          0.1951667,
          0.292733,
          0.4390667,
          0.658567,
          0.9878,
          1.48163,
          2.22233,
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        "values": [
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          0.0146054,
          0.0145682,
          0.0145124,
          0.0144287
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      "rise_power hidden_pwr_template13": {
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        "values": [
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    },
    "max_transition": 5.0,
    "min_pulse_width_high": 0.942151,
    "min_pulse_width_low": 1.890258,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.002453
  },
  "pin D": {
    "capacitance": 0.001635,
    "clock": "false",
    "direction": "input",
    "fall_capacitance": 0.001556,
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        "values": [
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      "rise_power hidden_pwr_template13": {
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        "values": [
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          0.0011753,
          0.0011572,
          0.00113,
          0.0010892
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      }
    },
    "max_transition": 5.0,
    "nextstate_type": "data",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001714,
    "timing": [
      {
        "clk_width": 6.8e-08,
        "fall_constraint vio_10_10_1": {
          "index_1": [
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            0.1041667,
            0.2083333,
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              3.8364998
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              0.6318827,
              0.8889086,
              1.4090637,
              1.9365432,
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              3.0061505,
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            [
              0.1382034,
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              0.226745,
              0.3546476,
              0.6080113,
              1.1354906,
              1.6617493,
              2.1953322,
              2.7276946,
              3.2637187
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint vio_10_10_1": {
          "index_1": [
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            0.1041667,
            0.2083333,
            0.4166667,
            0.8333333,
            1.6666667,
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            4.1666666,
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            0.4166667,
            0.8333333,
            1.6666667,
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          "values": [
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            [
              -0.4767597,
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              -0.3808938,
              -0.2651983,
              -0.03869,
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              1.4743037,
              1.8040291
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            [
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              -0.5629143,
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              -0.834697,
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              -0.625577,
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              0.4019837,
              0.7597853,
              1.101718,
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10
      },
      {
        "clk_width": 6.8e-08,
        "fall_constraint vio_10_10_1": {
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            0.1041667,
            0.2083333,
            0.4166667,
            0.8333333,
            1.6666667,
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            0.4166667,
            0.8333333,
            1.6666667,
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          "values": [
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              -0.9192239,
              -1.4467033,
              -1.9741828,
              -2.5016622
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint vio_10_10_1": {
          "index_1": [
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            0.2083333,
            0.4166667,
            0.8333333,
            1.6666667,
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          "index_2": [
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            0.4166667,
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            1.6666667,
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          "values": [
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              0.5294522,
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10
      }
    ]
  },
  "pin Q": {
    "direction": "output",
    "function": "IQ",
    "internal_power": {
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        "index_2": [
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        "values": [
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        "values": [
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        "rise_constraint vio_10_10_1": {
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        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10
      },
      {
        "clk_width": 6.8e-08,
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        "related_pin": "CLK",
        "rise_constraint vio_10_10_1": {
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        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10
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    ]
  },
  "test_cell": {
    "ff IQ,IQ_N": {
      "clocked_on": "CLK",
      "next_state": "D"
    },
    "pin CLK": {
      "direction": "input"
    },
    "pin D": {
      "direction": "input"
    },
    "pin Q": {
      "direction": "output",
      "function": "IQ",
      "signal_type": "test_scan_out"
    },
    "pin SCD": {
      "direction": "input",
      "signal_type": "test_scan_in"
    },
    "pin SCE": {
      "direction": "input",
      "signal_type": "test_scan_enable"
    }
  }
}