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  "area": 11.1888,
  "cell_footprint": "o41ai",
  "cell_leakage_power": 0.0,
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    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
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    "capacitance": 0.00271,
    "clock": "false",
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      "fall_power hidden_pwr_template13": {
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      "rise_power hidden_pwr_template13": {
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    "max_transition": 1.0,
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  "pin A2": {
    "capacitance": 0.00275,
    "clock": "false",
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      "fall_power hidden_pwr_template13": {
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      "rise_power hidden_pwr_template13": {
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    "max_transition": 1.0,
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    "capacitance": 0.00286,
    "clock": "false",
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      "fall_power hidden_pwr_template13": {
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        "values": [
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      "rise_power hidden_pwr_template13": {
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    "max_transition": 1.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
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    "capacitance": 0.00286,
    "clock": "false",
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      "fall_power hidden_pwr_template13": {
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        "values": [
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      "rise_power hidden_pwr_template13": {
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    "max_transition": 1.0,
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    "related_power_pin": "VPWR"
  },
  "pin B1": {
    "capacitance": 0.00312,
    "clock": "false",
    "direction": "input",
    "max_transition": 1.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
  },
  "pin Y": {
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    "function": "(!A1&!A2&!A3&!A4) | (!B1)",
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        "fall_power pwr_template13x3": {
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        "when": "(!A2&!A3&!A4&B1)"
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        "related_pin": "A4",
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}