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| "area": 17.5824, |
| "cell_footprint": "mux2", |
| "cell_leakage_power": 0.0, |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
| "pin A0": { |
| "capacitance": 0.00269, |
| "clock": "false", |
| "direction": "input", |
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| 1.5 |
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| 0.00689, |
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| 0.00806, |
| 0.00815 |
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| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin A1": { |
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| "direction": "input", |
| "internal_power": { |
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| 1.0, |
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| 0.00841, |
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| 0.00824, |
| 0.00822, |
| 0.00891, |
| 0.00901, |
| 0.00989, |
| 0.0102 |
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| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin S": { |
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| "internal_power": { |
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| 0.01479, |
| 0.01473, |
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| 0.016, |
| 0.0174, |
| 0.01769 |
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| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin X": { |
| "direction": "output", |
| "function": "(A0&!S) | (A1&S)", |
| "internal_power": [ |
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| }, |
| { |
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| "related_pin": "A1", |
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