{
  "area": 22.3776,
  "cell_footprint": "dlrtp",
  "cell_leakage_power": 9.785273,
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "latch IQ,IQ_N": {
    "clear": "!RESET_B",
    "data_in": "D",
    "enable": "GATE"
  },
  "leakage_power": [
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      "value": 11.0012124,
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    },
    {
      "value": 8.4026448,
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    },
    {
      "value": 7.8040188,
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    },
    {
      "value": 8.3435729,
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    },
    {
      "value": 11.0103766,
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    },
    {
      "value": 11.3919079,
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    },
    {
      "value": 12.4653949,
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    },
    {
      "value": 7.8630569,
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  ],
  "pg_pin VGND": {
    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
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    "clock": "false",
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    "fall_capacitance": 0.002022,
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    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
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        "sim_opt": "runlvl=5 accurate=1",
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  "pin GATE": {
    "capacitance": 0.002288,
    "clock": "true",
    "direction": "input",
    "fall_capacitance": 0.002211,
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      "rise_power hidden_pwr_template13": {
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    "max_transition": 1.5,
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    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.002365
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  "pin Q": {
    "direction": "output",
    "function": "IQ",
    "internal_power": [
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        "related_pin": "RESET_B",
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}