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  "cell_footprint": "buf",
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  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "leakage_power": [
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  "pg_pin VGND": {
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    "voltage_name": "VGND"
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  "pg_pin VNB": {
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    "voltage_name": "VNB"
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  "pg_pin VPB": {
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    "voltage_name": "VPB"
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  "pg_pin VPWR": {
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    "clock": "false",
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    "max_transition": 5.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.009104
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  "pin X": {
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    "max_capacitance": 4.98506,
    "max_transition": 4.627089,
    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
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      "fall_transition del_1_7_7": {
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      "timing_sense": "positive_unate"
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}