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  "area": 14.3856,
  "cell_footprint": "a2bb2o",
  "cell_leakage_power": 0.0,
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    "pg_type": "primary_ground",
    "voltage_name": "VGND"
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  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
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  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
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    "pg_type": "primary_power",
    "voltage_name": "VPWR"
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    "capacitance": 0.00231,
    "clock": "false",
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      "rise_power hidden_pwr_template13": {
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    "capacitance": 0.00233,
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      "fall_power hidden_pwr_template13": {
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      "rise_power hidden_pwr_template13": {
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    "capacitance": 0.00262,
    "clock": "false",
    "direction": "input",
    "internal_power": {
      "fall_power hidden_pwr_template13": {
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        "values": [
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      "rise_power hidden_pwr_template13": {
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    "related_power_pin": "VPWR"
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    "capacitance": 0.00255,
    "clock": "false",
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      "fall_power hidden_pwr_template13": {
        "index_1": [
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        "values": [
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      "rise_power hidden_pwr_template13": {
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    "function": "(B1&B2) | (!A1_N&!A2_N)",
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