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  "area": 11.1888,
  "cell_footprint": "o32ai",
  "cell_leakage_power": 0.0,
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    "pg_type": "primary_ground",
    "voltage_name": "VGND"
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  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
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  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
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    "pg_type": "primary_power",
    "voltage_name": "VPWR"
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    "capacitance": 0.00277,
    "clock": "false",
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      "rise_power hidden_pwr_template13": {
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    "capacitance": 0.0032,
    "clock": "false",
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      "fall_power hidden_pwr_template13": {
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      "rise_power hidden_pwr_template13": {
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    "capacitance": 0.00305,
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      "fall_power hidden_pwr_template13": {
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      "rise_power hidden_pwr_template13": {
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    "capacitance": 0.00308,
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      "fall_power hidden_pwr_template13": {
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      "rise_power hidden_pwr_template13": {
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    "capacitance": 0.00325,
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      "fall_power hidden_pwr_template13": {
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      "rise_power hidden_pwr_template13": {
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    "related_power_pin": "VPWR"
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  "pin Y": {
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    "function": "(!A1&!A2&!A3) | (!B1&!B2)",
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        "fall_power pwr_template13x4": {
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    ]
  }
}