| { | |
| "area": 49.5504, | |
| "cell_footprint": "sky130_fd_sc_ls__sdfrtp", | |
| "cell_leakage_power": 50.70292, | |
| "driver_waveform_fall": "ramp", | |
| "driver_waveform_rise": "ramp", | |
| "ff,IQ,IQ_N": { | |
| "clear": "!RESET_B", | |
| "clocked_on": "CLK", | |
| "next_state": "(D&!SCE) | (SCD&SCE)" | |
| }, | |
| "leakage_power": [ | |
| { | |
| "value": 47.9782472, | |
| "when": "D&!SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 37.5048437, | |
| "when": "!D&!SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 34.8770719, | |
| "when": "!D&SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 34.3006725, | |
| "when": "!D&!SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 30.1555012, | |
| "when": "!D&!SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 43.7811316, | |
| "when": "!D&!SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 48.4562754, | |
| "when": "D&!SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 43.7708962, | |
| "when": "D&SCD&!SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 45.1269599, | |
| "when": "D&!SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 30.8554533, | |
| "when": "D&!SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 50.7029192, | |
| "when": "!D&SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 38.2256538, | |
| "when": "!D&!SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 34.4257209, | |
| "when": "!D&!SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 49.3075625, | |
| "when": "D&SCD&SCE&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 38.9767578, | |
| "when": "D&!SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 34.437015, | |
| "when": "D&!SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 35.5986032, | |
| "when": "!D&SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 30.161452, | |
| "when": "!D&SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 42.850278, | |
| "when": "D&SCD&!SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 30.8608179, | |
| "when": "D&SCD&!SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 47.8506443, | |
| "when": "!D&SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 35.1270799, | |
| "when": "!D&SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 46.4547867, | |
| "when": "D&SCD&SCE&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 35.1332794, | |
| "when": "D&SCD&SCE&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 31.8268434, | |
| "when": "!D&!SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 31.8327977, | |
| "when": "!D&SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 36.0971057, | |
| "when": "!D&!SCD&SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 36.7985784, | |
| "when": "!D&SCD&SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 32.5270584, | |
| "when": "D&!SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 32.5323128, | |
| "when": "D&SCD&!SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 36.108375, | |
| "when": "D&!SCD&SCE&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 36.8042805, | |
| "when": "D&SCD&SCE&!RESET_B&!CLK" | |
| } | |
| ], | |
| "pg_pin,VGND": { | |
| "pg_type": "primary_ground", | |
| "related_bias_pin": "VPB", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin,VNB": { | |
| "pg_type": "nwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin,VPB": { | |
| "pg_type": "pwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VPB" | |
| }, | |
| "pg_pin,VPWR": { | |
| "pg_type": "primary_power", | |
| "related_bias_pin": "VNB", | |
| "voltage_name": "VPWR" | |
| }, | |
| "pin,CLK": { | |
| "capacitance": 0.002807, | |
| "clock": "true", | |
| "direction": "input", | |
| "fall_capacitance": 0.00271, | |
| "internal_power": { | |
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| 0.01, | |
| 0.01735, | |
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| 0.13172, | |
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| 0.0441198, | |
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| 0.0656357 | |
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| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| "values": [ | |
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| 0.0319855, | |
| 0.0377247, | |
| 0.0463439, | |
| 0.0592853 | |
| ] | |
| } | |
| }, | |
| "max_transition": 1.0, | |
| "min_pulse_width_high": 0.109389, | |
| "min_pulse_width_low": 0.163216, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002905 | |
| }, | |
| "pin,D": { | |
| "capacitance": 0.001896, | |
| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.001845, | |
| "internal_power": { | |
| "fall_power,hidden_pwr_template13": { | |
| "index_1": [ | |
| 0.01, | |
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| 0.13172, | |
| 0.19757, | |
| 0.29634, | |
| 0.44449, | |
| 0.6667, | |
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| ], | |
| "values": [ | |
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| 0.0126213, | |
| 0.0142116, | |
| 0.0166086, | |
| 0.0202153, | |
| 0.0256376 | |
| ] | |
| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 0.01, | |
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| 0.0130567, | |
| 0.0184576 | |
| ] | |
| } | |
| }, | |
| "max_transition": 1.0, | |
| "nextstate_type": "data", | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.001948, | |
| "timing": [ | |
| { | |
| "fall_constraint,vio_10_10_1": { | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| 0.5122539 | |
| ] | |
| ] | |
| }, | |
| "related_pin": "CLK", | |
| "rise_constraint,vio_10_10_1": { | |
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| 0.01, | |
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| 0.0625, | |
| 0.125, | |
| 0.25, | |
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| "values": [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| ] | |
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| }, | |
| "sim_opt": "runlvl=5 accurate=1", | |
| "timing_type": "setup_rising", | |
| "violation_delay_degrade_pct": 10 | |
| }, | |
| { | |
| "fall_constraint,vio_10_10_1": { | |
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| 0.125, | |
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| 0.75, | |
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