{ | |
"area": 47.952, | |
"cell_footprint": "sky130_fd_sc_ls__edfxbp", | |
"cell_leakage_power": 0.06170357, | |
"driver_waveform_fall": "ramp", | |
"driver_waveform_rise": "ramp", | |
"ff,IQ,IQ_N": { | |
"clocked_on": "CLK", | |
"next_state": "(D&DE) | (IQ&!DE)" | |
}, | |
"leakage_power": [ | |
{ | |
"value": 0.0672108, | |
"when": "!D&CLK" | |
}, | |
{ | |
"value": 0.0599828, | |
"when": "D&CLK" | |
}, | |
{ | |
"value": 0.0592304, | |
"when": "D&!CLK" | |
}, | |
{ | |
"value": 0.0603903, | |
"when": "!D&!CLK" | |
} | |
], | |
"pg_pin,VGND": { | |
"pg_type": "primary_ground", | |
"related_bias_pin": "VPB", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin,VNB": { | |
"pg_type": "nwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin,VPB": { | |
"pg_type": "pwell", | |
"physical_connection": "device_layer", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin,VPWR": { | |
"pg_type": "primary_power", | |
"related_bias_pin": "VNB", | |
"voltage_name": "VPWR" | |
}, | |
"pin,CLK": { | |
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"clock": "true", | |
"direction": "input", | |
"fall_capacitance": 0.002513, | |
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"min_pulse_width_low": 0.243407, | |
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"related_power_pin": "VPWR", | |
"rise_capacitance": 0.002772 | |
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"pin,D": { | |
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"clock": "false", | |
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"related_power_pin": "VPWR", | |
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} | |
] | |
}, | |
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