tree 0e8f18fa8d237d839fe591773142eb8c1d676ff2
parent 623269dc828fff55705725cb6256aec080ade465
parent bdf37537c854f82df3a2fa048c890f156837245e
author Tim 'mithro' Ansell <me@mith.ro> 1603940865 -0700
committer Tim 'mithro' Ansell <tansell@google.com> 1603940865 -0700

verilog: Fixing power pins usage in non-powerpin mode.

Previously even when `USE_POWER_PIN` was not defined, the drive strength
wrappers where still defining the power pins as ports.

Fixes https://github.com/google/skywater-pdk/issues/181

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>