| { |
| "area": 36.7632, |
| "cell_footprint": "sky130_fd_sc_ls__sdfxtp", |
| "cell_leakage_power": 0.03479473, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&!SCE) | (SCD&SCE)" |
| }, |
| "leakage_power": [ |
| { |
| "value": 0.0328394, |
| "when": "D&SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.0379034, |
| "when": "!D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.0354006, |
| "when": "D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.0329134, |
| "when": "D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.035786, |
| "when": "!D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.0327937, |
| "when": "!D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.0325561, |
| "when": "!D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.0324968, |
| "when": "!D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.0384821, |
| "when": "D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.0325651, |
| "when": "D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.0328394, |
| "when": "D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.0379775, |
| "when": "!D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.0355692, |
| "when": "!D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.0354746, |
| "when": "D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.0385415, |
| "when": "D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.0325769, |
| "when": "!D&SCD&!SCE&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.002406, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.002267, |
| "internal_power": { |
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| 0.1301, |
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| 0.292733, |
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| 0.658567, |
| 0.9878, |
| 1.48163, |
| 2.22233, |
| 3.33333, |
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| ], |
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| 0.0157909, |
| 0.0157068, |
| 0.0156832, |
| 0.0156479, |
| 0.0155949, |
| 0.0155155 |
| ] |
| }, |
| "rise_power,hidden_pwr_template13": { |
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| "values": [ |
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| 0.0116792, |
| 0.0116215, |
| 0.0115349, |
| 0.011405 |
| ] |
| } |
| }, |
| "max_transition": 5.0, |
| "min_pulse_width_high": 0.566369, |
| "min_pulse_width_low": 1.45836, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002546 |
| }, |
| "pin,D": { |
| "capacitance": 0.001652, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.001563, |
| "internal_power": { |
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| ], |
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| 0.0057594, |
| 0.0057365, |
| 0.0057351, |
| 0.0057331, |
| 0.00573, |
| 0.0057255 |
| ] |
| }, |
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| 0.0012246, |
| 0.0012025, |
| 0.0011693, |
| 0.0011194 |
| ] |
| } |
| }, |
| "max_transition": 5.0, |
| "nextstate_type": "data", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001741, |
| "timing": [ |
| { |
| "clk_width": 6.8e-08, |
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| [ |
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| 1.7779875, |
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| 3.1971226, |
| 3.7172776, |
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| [ |
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| [ |
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| 2.5028138, |
| 3.0217482, |
| 3.5419035, |
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| [ |
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| 3.332485, |
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| [ |
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| [ |
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| 3.4202401 |
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| [ |
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| [ |
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| 0.8486254, |
| 1.3663392, |
| 1.884053, |
| 2.4054288, |
| 2.925584 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
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| 0.0333333, |
| 0.1041667, |
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| [ |
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| 2.2855287, |
| 2.5945022 |
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| [ |
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| 1.5615161, |
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| [ |
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| 1.4616897, |
| 1.8011807, |
| 2.1223614, |
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| [ |
| 0.1339987, |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "clk_width": 6.8e-08, |
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| 0.0333333, |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_10_10_1": { |
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| 0.0333333, |
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| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
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| "timing_type": "hold_rising", |
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| } |
| ] |
| }, |
| "test_cell": { |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "D" |
| }, |
| "pin,CLK": { |
| "direction": "input" |
| }, |
| "pin,D": { |
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| }, |
| "pin,Q": { |
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| "function": "IQ", |
| "signal_type": "test_scan_out" |
| }, |
| "pin,SCD": { |
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| "signal_type": "test_scan_in" |
| }, |
| "pin,SCE": { |
| "direction": "input", |
| "signal_type": "test_scan_enable" |
| } |
| } |
| } |
