| { | |
| "area": 46.3536, | |
| "cell_footprint": "sky130_fd_sc_ls__sdfstp", | |
| "cell_leakage_power": 21.50224, | |
| "driver_waveform_fall": "ramp", | |
| "driver_waveform_rise": "ramp", | |
| "ff,IQ,IQ_N": { | |
| "clocked_on": "CLK", | |
| "next_state": "(D&!SCE) | (SCD&SCE)", | |
| "preset": "!SET_B" | |
| }, | |
| "leakage_power": [ | |
| { | |
| "value": 27.2905627, | |
| "when": "D&!SCD&!SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 23.7878233, | |
| "when": "!D&!SCD&SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 22.7885373, | |
| "when": "!D&SCD&!SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 21.4309548, | |
| "when": "!D&!SCD&!SCE&SET_B&!CLK" | |
| }, | |
| { | |
| "value": 21.0431867, | |
| "when": "!D&!SCD&!SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 21.6547544, | |
| "when": "!D&!SCD&!SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 23.9173605, | |
| "when": "D&!SCD&SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 19.0701002, | |
| "when": "D&SCD&!SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 19.6668104, | |
| "when": "D&!SCD&!SCE&SET_B&!CLK" | |
| }, | |
| { | |
| "value": 19.7733137, | |
| "when": "D&!SCD&!SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 28.9142861, | |
| "when": "!D&SCD&SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 23.148889, | |
| "when": "!D&!SCD&SCE&SET_B&!CLK" | |
| }, | |
| { | |
| "value": 22.7614088, | |
| "when": "!D&!SCD&SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 28.0231962, | |
| "when": "D&SCD&SCE&SET_B&CLK" | |
| }, | |
| { | |
| "value": 23.6936373, | |
| "when": "D&!SCD&SCE&SET_B&!CLK" | |
| }, | |
| { | |
| "value": 23.3057929, | |
| "when": "D&!SCD&SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 22.1498624, | |
| "when": "!D&SCD&!SCE&SET_B&!CLK" | |
| }, | |
| { | |
| "value": 21.7615899, | |
| "when": "!D&SCD&!SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 18.3520914, | |
| "when": "D&SCD&!SCE&SET_B&!CLK" | |
| }, | |
| { | |
| "value": 18.4586408, | |
| "when": "D&SCD&!SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 21.2904645, | |
| "when": "!D&SCD&SCE&SET_B&!CLK" | |
| }, | |
| { | |
| "value": 21.3969784, | |
| "when": "!D&SCD&SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 20.3992965, | |
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| }, | |
| { | |
| "value": 20.5058441, | |
| "when": "D&SCD&SCE&!SET_B&CLK" | |
| }, | |
| { | |
| "value": 18.4664852, | |
| "when": "!D&!SCD&!SCE&!SET_B&!CLK" | |
| }, | |
| { | |
| "value": 19.1852099, | |
| "when": "!D&SCD&!SCE&!SET_B&!CLK" | |
| }, | |
| { | |
| "value": 20.1845136, | |
| "when": "!D&!SCD&SCE&!SET_B&!CLK" | |
| }, | |
| { | |
| "value": 20.0934878, | |
| "when": "!D&SCD&SCE&!SET_B&!CLK" | |
| }, | |
| { | |
| "value": 18.469823, | |
| "when": "D&!SCD&!SCE&!SET_B&!CLK" | |
| }, | |
| { | |
| "value": 17.1551466, | |
| "when": "D&SCD&!SCE&!SET_B&!CLK" | |
| }, | |
| { | |
| "value": 20.7291269, | |
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| }, | |
| { | |
| "value": 19.2023499, | |
| "when": "D&SCD&SCE&!SET_B&!CLK" | |
| } | |
| ], | |
| "pg_pin,VGND": { | |
| "pg_type": "primary_ground", | |
| "related_bias_pin": "VPB", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin,VNB": { | |
| "pg_type": "nwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin,VPB": { | |
| "pg_type": "pwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VPB" | |
| }, | |
| "pg_pin,VPWR": { | |
| "pg_type": "primary_power", | |
| "related_bias_pin": "VNB", | |
| "voltage_name": "VPWR" | |
| }, | |
| "pin,CLK": { | |
| "capacitance": 0.002646, | |
| "clock": "true", | |
| "direction": "input", | |
| "fall_capacitance": 0.002523, | |
| "internal_power": { | |
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| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 0.0168332, | |
| 0.0167205 | |
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| } | |
| }, | |
| "max_transition": 1.5, | |
| "min_pulse_width_high": 0.269771, | |
| "min_pulse_width_low": 0.715767, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002769 | |
| }, | |
| "pin,D": { | |
| "capacitance": 0.001768, | |
| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.001673, | |
| "internal_power": { | |
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| 0.0067922 | |
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| }, | |
| "rise_power,hidden_pwr_template13": { | |
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| 0.0016308, | |
| 0.0015659 | |
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| } | |
| }, | |
| "max_transition": 1.5, | |
| "nextstate_type": "data", | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.001864, | |
| "timing": [ | |
| { | |
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| [ | |
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| [ | |
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| ] | |
| }, | |
| "related_pin": "CLK", | |
| "rise_constraint,vio_10_10_1": { | |
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| "values": [ | |
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| }, | |
| "sim_opt": "runlvl=5 accurate=1", | |
| "timing_type": "setup_rising", | |
| "violation_delay_degrade_pct": 10 | |
| }, | |
| { | |
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