| { |
| "area": 25.5744, |
| "cell_footprint": "sky130_fd_sc_ls__dlclkp", |
| "cell_leakage_power": 0.02042201, |
| "clock_gating_integrated_cell": "latch_posedge", |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "leakage_power": [ |
| { |
| "value": 0.0194024, |
| "when": "!GATE&CLK" |
| }, |
| { |
| "value": 0.021879, |
| "when": "GATE&!CLK" |
| }, |
| { |
| "value": 0.020947, |
| "when": "GATE&CLK" |
| }, |
| { |
| "value": 0.0194597, |
| "when": "!GATE&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.003827, |
| "clock": "true", |
| "clock_gate_clock_pin": "true", |
| "direction": "input", |
| "fall_capacitance": 0.003687, |
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| } |
| }, |
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| "min_pulse_width_low": 1.151501, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.003966 |
| }, |
| "pin,GATE": { |
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| "clock": "false", |
| "clock_gate_enable_pin": "true", |
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| }, |
| "max_transition": 5.0, |
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| "related_power_pin": "VPWR", |
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| ] |
| }, |
| "related_pin": "CLK", |
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| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
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| }, |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "pin,GCLK": { |
| "clock_gate_out_pin": "true", |
| "direction": "output", |
| "internal_power": { |
| "fall_power,pwr_template13x9": { |
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| 1.0490376, |
| 1.5518211, |
| 2.288826, |
| 3.4060375 |
| ], |
| [ |
| 0.0606706, |
| 0.2531964, |
| 0.3508064, |
| 0.4990594, |
| 0.717966, |
| 1.0488693, |
| 1.5480002, |
| 2.2934934, |
| 3.4066032 |
| ], |
| [ |
| 0.060709, |
| 0.2533539, |
| 0.3503922, |
| 0.4985098, |
| 0.7183825, |
| 1.0528053, |
| 1.5451186, |
| 2.2932711, |
| 3.4095575 |
| ], |
| [ |
| 0.0606473, |
| 0.2534753, |
| 0.3502291, |
| 0.4974498, |
| 0.7179265, |
| 1.0497709, |
| 1.5447209, |
| 2.2973941, |
| 3.4052201 |
| ], |
| [ |
| 0.061431, |
| 0.2535933, |
| 0.3501035, |
| 0.4984123, |
| 0.7183432, |
| 1.0487687, |
| 1.5515931, |
| 2.288705, |
| 3.4155265 |
| ], |
| [ |
| 0.0638559, |
| 0.2546855, |
| 0.3508937, |
| 0.4988825, |
| 0.7181859, |
| 1.0489468, |
| 1.5516645, |
| 2.2886639, |
| 3.4053764 |
| ], |
| [ |
| 0.066477, |
| 0.2558683, |
| 0.3534264, |
| 0.4997177, |
| 0.7181459, |
| 1.0485476, |
| 1.5471336, |
| 2.2971167, |
| 3.4063445 |
| ], |
| [ |
| 0.071708, |
| 0.2589157, |
| 0.3554333, |
| 0.5003671, |
| 0.7199844, |
| 1.0497633, |
| 1.5483913, |
| 2.2908184, |
| 3.4057659 |
| ], |
| [ |
| 0.0783095, |
| 0.2630137, |
| 0.3584515, |
| 0.5048978, |
| 0.7228172, |
| 1.0520476, |
| 1.5470198, |
| 2.2915581, |
| 3.4079395 |
| ], |
| [ |
| 0.0898098, |
| 0.2687783, |
| 0.363744, |
| 0.5082993, |
| 0.7271314, |
| 1.0553258, |
| 1.5495983, |
| 2.2922948, |
| 3.4139285 |
| ] |
| ] |
| }, |
| "timing_sense": "positive_unate" |
| } |
| }, |
| "pin,M0": { |
| "direction": "internal", |
| "internal_node": "M0", |
| "related_ground_pin": "VNB", |
| "related_power_pin": "VPWR" |
| }, |
| "statetable,CLK GATE,M0": { |
| "table": [ |
| "L L : - : L", |
| "L H : - : H", |
| "H - : - : N" |
| ] |
| } |
| } |
