blob: 73c8325b41e424538c6f3902191bac6ebed63d82 [file] [log] [blame]
Kevin Kelleye35e6002020-05-06 11:00:01 +07001{
2 "description": "3-input OR into 3-input AND.",
3 "equation": "X = ((A1 | A2 | A3) & B1 & C1)",
4 "file_prefix": "sky130_fd_sc_lp__o311a",
5 "library": "sky130_fd_sc_lp",
6 "name": "o311a",
7 "parameters": [],
8 "ports": [
9 [
10 "signal",
11 "X",
12 "output",
13 ""
14 ],
15 [
16 "signal",
17 "A1",
18 "input",
19 ""
20 ],
21 [
22 "signal",
23 "A2",
24 "input",
25 ""
26 ],
27 [
28 "signal",
29 "A3",
30 "input",
31 ""
32 ],
33 [
34 "signal",
35 "B1",
36 "input",
37 ""
38 ],
39 [
40 "signal",
41 "C1",
42 "input",
43 ""
44 ],
45 [
46 "power",
47 "VPWR",
48 "input",
49 "supply1"
50 ],
51 [
52 "power",
53 "VGND",
54 "input",
55 "supply0"
56 ],
57 [
58 "power",
59 "VPB",
60 "input",
61 "supply1"
62 ],
63 [
64 "power",
65 "VNB",
66 "input",
67 "supply0"
68 ]
69 ],
70 "type": "cell",
71 "verilog_name": "sky130_fd_sc_lp__o311a"
72}