| { |
| "area": 30.3696, |
| "cell_footprint": "srdlxtp", |
| "cell_leakage_power": 0.0, |
| "latch IQ,IQ_N": { |
| "data_in": "D&SLEEP_B", |
| "enable": "GATE" |
| }, |
| "pg_pin KAPWR": { |
| "pg_type": "internal_power", |
| "voltage_name": "KAPWR" |
| }, |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
| "pin D": { |
| "capacitance": 0.0019, |
| "clock": "false", |
| "direction": "input", |
| "internal_power": { |
| "fall_power hidden_pwr_template13": { |
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| 0.01735, |
| 0.02602, |
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| 0.29634, |
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| ], |
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| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| 0.02602, |
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| ], |
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| 0.00443 |
| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": [ |
| { |
| "fall_constraint sethold_template_fall10x10": { |
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| ], |
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| [ |
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| ] |
| }, |
| "related_pin": "GATE", |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "timing_type": "setup_falling" |
| }, |
| { |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "GATE", |
| "rise_constraint sethold_template_rise10x10": { |
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| }, |
| "timing_type": "hold_falling" |
| } |
| ] |
| }, |
| "pin GATE": { |
| "capacitance": 0.00196, |
| "clock": "true", |
| "direction": "input", |
| "internal_power": { |
| "fall_power hidden_pwr_template13": { |
| "index_1": [ |
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| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "min_pulse_width_high": 1.23542, |
| "min_pulse_width_low": 1.23542, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQ", |
| "internal_power": [ |
| { |
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| 0.5253, |
| 0.6248, |
| 0.7418, |
| 0.883, |
| 1.0518, |
| 1.2551, |
| 1.5003 |
| ], |
| [ |
| 0.0472, |
| 0.1734, |
| 0.2002, |
| 0.2325, |
| 0.2716, |
| 0.3188, |
| 0.3754, |
| 0.4438, |
| 0.5256, |
| 0.6238, |
| 0.7411, |
| 0.8831, |
| 1.0505, |
| 1.2558, |
| 1.5001 |
| ], |
| [ |
| 0.0472, |
| 0.1734, |
| 0.2001, |
| 0.2328, |
| 0.2716, |
| 0.3188, |
| 0.3755, |
| 0.4437, |
| 0.5255, |
| 0.6234, |
| 0.7434, |
| 0.883, |
| 1.0525, |
| 1.2567, |
| 1.5012 |
| ], |
| [ |
| 0.0472, |
| 0.1734, |
| 0.2002, |
| 0.2325, |
| 0.2717, |
| 0.3187, |
| 0.3756, |
| 0.4433, |
| 0.5253, |
| 0.6236, |
| 0.7416, |
| 0.8828, |
| 1.0519, |
| 1.2549, |
| 1.5023 |
| ], |
| [ |
| 0.0471, |
| 0.1734, |
| 0.2001, |
| 0.2327, |
| 0.2717, |
| 0.3189, |
| 0.3754, |
| 0.4437, |
| 0.5267, |
| 0.6235, |
| 0.7434, |
| 0.8836, |
| 1.052, |
| 1.2571, |
| 1.5014 |
| ] |
| ] |
| }, |
| "timing_sense": "non_unate", |
| "timing_type": "rising_edge" |
| } |
| ] |
| }, |
| "pin SLEEP_B": { |
| "capacitance": 0.002357, |
| "clock": "false", |
| "comp_attribute power_gating_pin": "power_pin_1\", \"1", |
| "direction": "input", |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "power_gating_cell": "PG_1" |
| } |
