{
  "area": 27.1728,
  "cell_footprint": "sdlclkp",
  "cell_leakage_power": 0.0,
  "clock_gating_integrated_cell": "latch_posedge_precontrol",
  "pg_pin VGND": {
    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
  "pin CLK": {
    "capacitance": 0.01246,
    "clock": "true",
    "clock_gate_clock_pin": "true",
    "direction": "input",
    "internal_power": {
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          0.02602,
          0.03903,
          0.05855,
          0.08782,
          0.13172,
          0.19757,
          0.29634,
          0.44449,
          0.6667,
          1.0,
          1.5
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        "values": [
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          0.01341,
          0.01352,
          0.01337,
          0.01415,
          0.0132,
          0.01316,
          0.01321,
          0.0131,
          0.01402,
          0.01405,
          0.01525,
          0.01553
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      },
      "rise_power hidden_pwr_template13": {
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          0.02602,
          0.03903,
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          0.13172,
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        "values": [
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          0.0089,
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          0.00852,
          0.00851,
          0.00929,
          0.00952
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    },
    "max_transition": 1.0,
    "min_pulse_width_high": 0.40925,
    "min_pulse_width_low": 0.40925,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
  },
  "pin GATE": {
    "capacitance": 0.00209,
    "clock": "false",
    "clock_gate_enable_pin": "true",
    "direction": "input",
    "internal_power": {
      "fall_power hidden_pwr_template13": {
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          0.03903,
          0.05855,
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          0.13172,
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          0.29634,
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          0.6667,
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          1.5
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        "values": [
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          0.00826,
          0.00821,
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          0.00815,
          0.00812,
          0.00886,
          0.00897,
          0.00987,
          0.01024
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      "rise_power hidden_pwr_template13": {
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          0.02602,
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        "values": [
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          0.00124,
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          0.00163,
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          0.00147,
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          0.0015,
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          0.00184,
          0.0022
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      }
    },
    "max_transition": 1.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "timing": [
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            0.03125,
            0.0625,
            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "values": [
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              0.51639,
              0.46072,
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              0.41092,
              0.36111,
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              0.72146,
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              0.37283
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            [
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              0.82107,
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              0.72732,
              0.68631
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint sethold_template_rise10x10": {
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            0.0625,
            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "index_2": [
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            0.0625,
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            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "values": [
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              0.2615,
              0.22049,
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              0.16189,
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              0.17068,
              0.14725,
              0.12381
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              0.2117,
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        "timing_type": "setup_rising"
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      {
        "fall_constraint sethold_template_fall10x10": {
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            0.0625,
            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
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          "index_2": [
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            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "values": [
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              -0.1633,
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              -0.11057,
              -0.05783,
              0.01834,
              0.07693,
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              0.20877
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              -0.24533,
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              -0.34494,
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              -0.31564,
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              -0.10471,
              -0.0549,
              -0.01096,
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              -0.43283,
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              -0.3801,
              -0.33322,
              -0.25705,
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              -0.51486,
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              -0.46799,
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        "related_pin": "CLK",
        "rise_constraint sethold_template_rise10x10": {
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            0.25,
            0.5,
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            1.0,
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          "values": [
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              0.07693,
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              0.09744,
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              0.1824,
              0.21463,
              0.241,
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        "timing_type": "hold_rising"
      }
    ]
  },
  "pin GCLK": {
    "clock_gate_out_pin": "true",
    "direction": "output",
    "internal_power": {
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        "index_2": [
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          0.06216,
          0.0777,
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          0.15176,
          0.1897,
          0.23713
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        "values": [
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      "timing_sense": "positive_unate"
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  "pin M0": {
    "direction": "internal",
    "internal_node": "m0",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
  },
  "pin SCE": {
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    "clock": "false",
    "clock_gate_test_pin": "true",
    "direction": "input",
    "internal_power": {
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    "max_transition": 1.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "timing": [
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        "related_pin": "CLK",
        "rise_constraint sethold_template_rise10x10": {
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        },
        "timing_type": "setup_rising"
      },
      {
        "fall_constraint sethold_template_fall10x10": {
          "index_1": [
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            0.03125,
            0.0625,
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            0.5,
            0.75,
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          "index_2": [
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            0.5,
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        "related_pin": "CLK",
        "rise_constraint sethold_template_rise10x10": {
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              -0.04611,
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            [
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            [
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          ]
        },
        "timing_type": "hold_rising"
      }
    ]
  },
  "statetable \"CLK GATE SCE\",\"M0\"": {
    "table": "L L L : - : L ,L L H : - : H ,L H L : - : H ,L H H : - : H ,H - - : - : N"
  }
}