{
  "area": 23.976,
  "cell_footprint": "dlclkp",
  "cell_leakage_power": 0.0,
  "clock_gating_integrated_cell": "latch_posedge",
  "dont_use": "true",
  "pg_pin VGND": {
    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
  "pin CLK": {
    "capacitance": 0.0122,
    "clock": "true",
    "clock_gate_clock_pin": "true",
    "direction": "input",
    "internal_power": {
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          0.01735,
          0.02602,
          0.03903,
          0.05855,
          0.08782,
          0.13172,
          0.19757,
          0.29634,
          0.44449,
          0.6667,
          1.0,
          1.5
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        "values": [
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          0.01294,
          0.01342,
          0.01275,
          0.0127,
          0.01269,
          0.01261,
          0.01257,
          0.01251,
          0.01344,
          0.01335,
          0.01429,
          0.01421
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      },
      "rise_power hidden_pwr_template13": {
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        "values": [
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          0.0091,
          0.00901
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    },
    "max_transition": 1.0,
    "min_pulse_width_high": 0.52643,
    "min_pulse_width_low": 0.52643,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
  },
  "pin GATE": {
    "capacitance": 0.00182,
    "clock": "false",
    "clock_gate_enable_pin": "true",
    "direction": "input",
    "internal_power": {
      "fall_power hidden_pwr_template13": {
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          0.02602,
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          0.6667,
          1.0,
          1.5
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        "values": [
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          0.00214,
          0.00213,
          0.00214,
          0.00212,
          0.00212,
          0.00214,
          0.0023,
          0.00231,
          0.00248,
          0.00248
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      "rise_power hidden_pwr_template13": {
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          0.02602,
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        "values": [
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          0.00211,
          0.00213,
          0.00206,
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          0.00208,
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          0.00229,
          0.00227,
          0.00246,
          0.00246
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      }
    },
    "max_transition": 1.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "timing": [
      {
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            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "index_2": [
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            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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              0.18512,
              0.1148
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              0.79156,
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              0.76812,
              0.73883,
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              0.39312,
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            [
              0.93219,
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              0.80914,
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              0.60992,
              0.52789,
              0.45465,
              0.38726
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            [
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              1.03766,
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              0.83844,
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              0.59234,
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            [
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              1.10797,
              1.02594,
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              0.86187,
              0.79156
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint sethold_template_rise10x10": {
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            0.03125,
            0.0625,
            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "index_2": [
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            0.0625,
            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
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            1.5
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          "values": [
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              0.02105
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        "timing_type": "setup_rising"
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      {
        "fall_constraint sethold_template_fall10x10": {
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            0.03125,
            0.0625,
            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "index_2": [
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            0.0625,
            0.125,
            0.25,
            0.5,
            0.75,
            1.0,
            1.25,
            1.5
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          "values": [
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              -0.04047,
              -0.03168,
              -0.0141,
              0.01519,
              0.07965,
              0.18512,
              0.27594,
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              0.43121,
              0.50445
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              -0.04926,
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              0.0064,
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              -0.16938,
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              -0.30414,
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              -0.07563,
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              -0.43891,
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              -0.41547,
              -0.38031,
              -0.32172,
              -0.21039,
              -0.1225,
              -0.0434,
              0.02984,
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              -0.56781,
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              -0.03754
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              -0.70844,
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        "related_pin": "CLK",
        "rise_constraint sethold_template_rise10x10": {
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            0.5,
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          "values": [
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        "timing_type": "hold_rising"
      }
    ]
  },
  "pin GCLK": {
    "clock_gate_out_pin": "true",
    "direction": "output",
    "internal_power": {
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        "index_2": [
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          0.10988,
          0.13186,
          0.15823,
          0.18987
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        "values": [
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      "related_pin": "CLK",
      "rise_transition delay_template13x19": {
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      "timing_sense": "positive_unate"
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  },
  "pin M0": {
    "direction": "internal",
    "internal_node": "m0",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
  },
  "statetable \"CLK GATE\",\"M0\"": {
    "table": "L L : - : L ,L H : - : H ,H - : - : N"
  }
}