/**
 * Copyright 2020 The SkyWater PDK Authors
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     https://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

`ifndef SKY130_FD_SC_LP__UDP_DFF_P_PP_PKG_SN_V
`define SKY130_FD_SC_LP__UDP_DFF_P_PP_PKG_SN_V

/**
 * udp_dff$P_pp$PKG$sN: Positive edge triggered D flip-flop
 *                      (Q output UDP).
 *
 * Verilog primitive definition.
 *
 * WARNING: This file is autogenerated, do not modify directly!
 */

`timescale 1ns / 1ps
`default_nettype none

`ifdef NO_PRIMITIVES
`include "./sky130_fd_sc_lp__udp_dff_p_pp_pkg_sn.blackbox.v"
`else
primitive sky130_fd_sc_lp__udp_dff$P_pp$PKG$sN (
    Q       ,
    D       ,
    CLK     ,
    SLEEP_B ,
    NOTIFIER,
    KAPWR   ,
    VGND    ,
    VPWR
);

    output Q       ;
    input  D       ;
    input  CLK     ;
    input  SLEEP_B ;
    input  NOTIFIER;
    input  KAPWR   ;
    input  VGND    ;
    input  VPWR    ;

    reg Q;

    table
     //          D           CLK  SLEEP_B NOTIFIER KAPWR VGND VPWR :  Qt : Qt+1
                 1            r      1       ?       1    0    1   :  ?  :  1    ; // clocked data
                 0            r      1       ?       1    0    1   :  ?  :  0    ;
                 1           (x1)    1       ?       1    0    1   :  1  :  1    ; // reducing pessimism
                 0           (x1)    1       ?       1    0    1   :  0  :  0    ;
                 1           (0x)    1       ?       1    0    1   :  1  :  1    ;
                 0           (0x)    1       ?       1    0    1   :  0  :  0    ;
                 0            x      1       ?       1    0    1   :  0  :  0    ; // Hold when CLK=X and D=Q
                 1            x      1       ?       1    0    1   :  1  :  1    ; // Hold when CLK=X and D=Q
                 ?           (?0)    1       ?       1    0    1   :  ?  :  -    ;
                 *            b      1       ?       1    0    1   :  ?  :  -    ; // ignore edges on data
                 *            ?      0       ?       1    0    ?   :  ?  :  -    ; // ignore edges on data
                 ?            ?      0       ?       1    0    *   :  ?  :  -    ; // Retain state during sleep
                 ?            *      0       ?       1    0    ?   :  ?  :  -    ; // Retain state during sleep
                 ?            0      f       ?       1    0    1   :  ?  :  -    ; // Retain state during sleep
                 ?            0      r       ?       1    0    1   :  ?  :  -    ; // Retain state during sleep
                 ?            1      *       ?       1    0    1   :  ?  :  x    ; // SLEEPB cannot change unless CLK is low
                 ?            x      *       ?       1    0    1   :  ?  :  x    ; // SLEEPB cannot change unless CLK is low
                 ?            ?      *       ?       1    0    x   :  ?  :  x    ; // SLEEPB cannot change unless VPWR is high
                 ?            ?      *       ?       1    0    0   :  ?  :  x    ; // SLEEPB cannot change unless VPWR is high
        // ['IfDef(functional)', '']                 ?            ?      1       *       1    0    1   :  ?  :  -    ; // any change on notifier
        // ['Else', '']                 ?            ?      1       *       1    0    1   :  ?  :  x    ; // any change on notifier
        // ['EndIfDef(functional)', '']                 ?            ?      ?       ?       *    ?    1   :  ?  :  x    ; // unknown if kapwr changes
                 ?            ?      ?       ?       ?    *    1   :  ?  :  x    ; // unknown if vgnd changes
    endtable
endprimitive
`endif // NO_PRIMITIVES

`default_nettype wire
`endif  // SKY130_FD_SC_LP__UDP_DFF_P_PP_PKG_SN_V