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| "cell_footprint": "and3", |
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| "dont_use": "true", |
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| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
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| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
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| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
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| "voltage_name": "VPWR" |
| }, |
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| }, |
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