tree f95106898be151c1c074ec9cf6ce084f7fc1d0b8
parent 7dbbc58075ddaa96cc015f3b0f3fc886363729a3
parent 075cfd7bbb090dc7b463be90425e039b66498687
author Tim 'mithro' Ansell <me@mith.ro> 1603940948 -0700
committer Tim 'mithro' Ansell <tansell@google.com> 1603940948 -0700

verilog: Fixing power pins usage in non-powerpin mode.

Previously even when `USE_POWER_PIN` was not defined, the drive strength
wrappers where still defining the power pins as ports.

Fixes https://github.com/google/skywater-pdk/issues/181

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>