| { |
| "area": 60.5616, |
| "cell_footprint": "sky130_fd_sc_hvl__sdfxtp", |
| "cell_leakage_power": 0.3864536, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&!SCE) | (SCD&SCE)" |
| }, |
| "leakage_power": [ |
| { |
| "value": 0.3444668, |
| "when": "D&SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.3949546, |
| "when": "!D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.3696492, |
| "when": "D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.4022915, |
| "when": "D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.383451, |
| "when": "!D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.3839898, |
| "when": "!D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.3881264, |
| "when": "!D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.3751472, |
| "when": "!D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.3943953, |
| "when": "D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.3285557, |
| "when": "D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.3538315, |
| "when": "D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.4434145, |
| "when": "!D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.3974811, |
| "when": "!D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.4181092, |
| "when": "D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.4073746, |
| "when": "D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.3980199, |
| "when": "!D&SCD&!SCE&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.002493, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.002391, |
| "internal_power": { |
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| "index_1": [ |
| 0.001, |
| 0.013, |
| 0.026, |
| 0.072, |
| 0.216, |
| 0.432, |
| 0.864, |
| 1.296, |
| 2.5, |
| 3.125, |
| 3.7499999 |
| ], |
| "values": [ |
| 0.0999431, |
| 0.0997146, |
| 0.0994671, |
| 0.1012901, |
| 0.1069982, |
| 0.114388, |
| 0.1291683, |
| 0.1475539, |
| 0.1987965, |
| 0.2253963, |
| 0.2519961 |
| ] |
| }, |
| "rise_power,hidden_pwr_template11": { |
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| 0.001, |
| 0.013, |
| 0.026, |
| 0.072, |
| 0.216, |
| 0.432, |
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| 2.5, |
| 3.125, |
| 3.7499999 |
| ], |
| "values": [ |
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| 0.076344, |
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| 0.0778804, |
| 0.0845985, |
| 0.0980355, |
| 0.1165376, |
| 0.1681047, |
| 0.194873, |
| 0.2216413 |
| ] |
| } |
| }, |
| "max_transition": 3.75, |
| "min_pulse_width_high": 0.32363, |
| "min_pulse_width_low": 0.60927, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002596 |
| }, |
| "pin,D": { |
| "capacitance": 0.002393, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.002275, |
| "internal_power": { |
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| 0.001, |
| 0.013, |
| 0.026, |
| 0.072, |
| 0.216, |
| 0.432, |
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| 2.5, |
| 3.125, |
| 3.7499999 |
| ], |
| "values": [ |
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| 0.0323328, |
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| 0.0380584, |
| 0.0447506, |
| 0.0526524, |
| 0.0746761, |
| 0.0861084, |
| 0.0975407 |
| ] |
| }, |
| "rise_power,hidden_pwr_template11": { |
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| 0.013, |
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| "values": [ |
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| 0.0093457, |
| 0.0093102, |
| 0.0092008, |
| 0.0118056, |
| 0.0170158, |
| 0.0247524, |
| 0.0463161, |
| 0.0575096, |
| 0.068703 |
| ] |
| } |
| }, |
| "max_transition": 3.75, |
| "nextstate_type": "data", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002511, |
| "timing": [ |
| { |
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| 0.013, |
| 0.026, |
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| 1.0395325, |
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| [ |
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| 1.0347311, |
| 1.4291029, |
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| [ |
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| [ |
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| [ |
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| [ |
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| 0.542, |
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| 1.5138294, |
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| [ |
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| 0.4609681, |
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| 0.882127, |
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| 1.4819837, |
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| [ |
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| 1.4172018, |
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| [ |
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| [ |
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| 0.6052421, |
| 0.7652616, |
| 1.1742818, |
| 1.3736633, |
| 1.5681621 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_11_11_1": { |
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| 0.001, |
| 0.013, |
| 0.026, |
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| 3.125, |
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| "values": [ |
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| [ |
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| [ |
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| 0.3426771, |
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| [ |
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| [ |
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| [ |
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| [ |
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| 0.1554016, |
| 0.0984355 |
| ] |
| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "fall_constraint,vio_11_11_1": { |
| "index_1": [ |
| 0.001, |
| 0.013, |
| 0.026, |
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| [ |
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| ] |
| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_11_11_1": { |
| "index_1": [ |
| 0.001, |
| 0.013, |
| 0.026, |
| 0.072, |
| 0.216, |
| 0.432, |
| 0.864, |
| 1.296, |
| 2.5, |
| 3.125, |
| 3.7499999 |
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| [ |
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