| { |
| "area": 60.5616, |
| "cell_footprint": "sky130_fd_sc_hvl__sdfxtp", |
| "cell_leakage_power": 0.518898, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&!SCE) | (SCD&SCE)" |
| }, |
| "leakage_power": [ |
| { |
| "value": 0.4732724, |
| "when": "D&SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.539331, |
| "when": "!D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.5089423, |
| "when": "D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.4755239, |
| "when": "D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.4732724, |
| "when": "D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.5635646, |
| "when": "!D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.5500351, |
| "when": "!D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.5331761, |
| "when": "D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.5500373, |
| "when": "D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 0.5447549, |
| "when": "!D&SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.4975061, |
| "when": "D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.5256529, |
| "when": "!D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 0.5203727, |
| "when": "!D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.5447526, |
| "when": "!D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 0.4984442, |
| "when": "!D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 0.5037289, |
| "when": "D&!SCD&SCE&CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.002506, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.002427, |
| "internal_power": { |
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| 0.001, |
| 0.013, |
| 0.026, |
| 0.072, |
| 0.216, |
| 0.432, |
| 0.864, |
| 1.296, |
| 2.5, |
| 3.125, |
| 3.7499999 |
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| 0.2433758, |
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| 0.5022241, |
| 0.6510376, |
| 1.0657877, |
| 1.2810853, |
| 1.4963828 |
| ] |
| }, |
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| 0.013, |
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| 1.208596, |
| 1.4247711 |
| ] |
| } |
| }, |
| "max_transition": 3.75, |
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| "min_pulse_width_low": 0.25991, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002584 |
| }, |
| "pin,D": { |
| "capacitance": 0.002453, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.002343, |
| "internal_power": { |
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| 0.013, |
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| 0.5758836, |
| 0.6797066 |
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| }, |
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| 0.4047132, |
| 0.5082019, |
| 0.6116908 |
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| } |
| }, |
| "max_transition": 3.75, |
| "nextstate_type": "data", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002564, |
| "timing": [ |
| { |
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| [ |
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| 1.338263, |
| 1.5559551 |
| ] |
| ] |
| }, |
| "related_pin": "CLK", |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
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| ] |
| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_11_11_1": { |
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| 0.001, |
| 0.013, |
| 0.026, |
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| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_11_11_1": { |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "test_cell": { |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "D" |
| }, |
| "pin,CLK": { |
| "direction": "input" |
| }, |
| "pin,D": { |
| "direction": "input" |
| }, |
| "pin,Q": { |
| "direction": "output", |
| "function": "IQ", |
| "signal_type": "test_scan_out" |
| }, |
| "pin,SCD": { |
| "direction": "input", |
| "signal_type": "test_scan_in" |
| }, |
| "pin,SCE": { |
| "direction": "input", |
| "signal_type": "test_scan_enable" |
| } |
| } |
| } |
