| { |
| "area": 60.5616, |
| "cell_footprint": "sky130_fd_sc_hvl__sdfxtp", |
| "cell_leakage_power": 7.618931, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "(D&!SCE) | (SCD&SCE)" |
| }, |
| "leakage_power": [ |
| { |
| "value": 8.8383603, |
| "when": "D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 6.8253816, |
| "when": "!D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 9.4099883, |
| "when": "!D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 7.4965447, |
| "when": "!D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 8.5908072, |
| "when": "!D&!SCD&!SCE&CLK" |
| }, |
| { |
| "value": 9.007179, |
| "when": "D&!SCD&SCE&CLK" |
| }, |
| { |
| "value": 6.0884187, |
| "when": "D&SCD&!SCE&CLK" |
| }, |
| { |
| "value": 7.4709092, |
| "when": "D&!SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 7.5703479, |
| "when": "!D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 6.4124452, |
| "when": "!D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 7.5459505, |
| "when": "D&SCD&SCE&CLK" |
| }, |
| { |
| "value": 7.9129734, |
| "when": "D&!SCD&SCE&!CLK" |
| }, |
| { |
| "value": 8.9970635, |
| "when": "!D&SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 7.355168, |
| "when": "D&SCD&!SCE&!CLK" |
| }, |
| { |
| "value": 6.2028813, |
| "when": "!D&SCD&SCE&!CLK" |
| }, |
| { |
| "value": 6.178476, |
| "when": "D&SCD&SCE&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "nwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.00254, |
| "clock": "true", |
| "direction": "input", |
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| "internal_power": { |
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| 0.013, |
| 0.026, |
| 0.072, |
| 0.216, |
| 0.432, |
| 0.864, |
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| 2.5, |
| 3.125, |
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| 2.006897 |
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| ] |
| } |
| }, |
| "max_transition": 3.75, |
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| "min_pulse_width_low": 0.303855, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
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| }, |
| "pin,D": { |
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| "clock": "false", |
| "direction": "input", |
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| "internal_power": { |
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| 0.8628492 |
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| }, |
| "max_transition": 3.75, |
| "nextstate_type": "data", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
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| "timing": [ |
| { |
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| ] |
| }, |
| "related_pin": "CLK", |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
| "clk_width": 2.6e-08, |
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| }, |
| "related_pin": "CLK", |
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| }, |
| "related_pin": "CLK", |
| "rise_constraint,vio_11_11_1": { |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| }, |
| "test_cell": { |
| "ff,IQ,IQ_N": { |
| "clocked_on": "CLK", |
| "next_state": "D" |
| }, |
| "pin,CLK": { |
| "direction": "input" |
| }, |
| "pin,D": { |
| "direction": "input" |
| }, |
| "pin,Q": { |
| "direction": "output", |
| "function": "IQ", |
| "signal_type": "test_scan_out" |
| }, |
| "pin,SCD": { |
| "direction": "input", |
| "signal_type": "test_scan_in" |
| }, |
| "pin,SCE": { |
| "direction": "input", |
| "signal_type": "test_scan_enable" |
| } |
| } |
| } |
