Fixing the `power_gating_pin`.

Updating sky130_fd_sc_hvl 0.0.1.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_085C_5v50.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_085C_5v50.lib.json
index 4d4043b..da5f3f6 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_085C_5v50.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_085C_5v50.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_100C_5v50.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_100C_5v50.lib.json
index 77f5337..a4af37f 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_100C_5v50.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_100C_5v50.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_150C_5v50.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_150C_5v50.lib.json
index 6130f54..c5bcc6e 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_150C_5v50.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v40.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v40.lib.json
index 46c6c00..7d5d7f3 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v40.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v95.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v95.lib.json
index fd75efe..15cadee 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v95.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_5v50_ccsnoise.lib.json
index 09fd392..388e4af 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v65.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v65.lib.json
index 850b017..86be40b 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v65.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v95.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v95.lib.json
index 3dd4225..622f9e4 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v95.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_1v95.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_3v00.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_3v00.lib.json
index 4b3d52a..8a54c98 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_3v00.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_150C_1v65.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_150C_1v65.lib.json
index fa921df..b607f74 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_150C_1v65.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v32.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v32.lib.json
index 43cb180..d7752e3 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v32.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v32.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v49.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v49.lib.json
index 6888ada..cd16c59 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v49.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v49.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v65_ccsnoise.lib.json
index 2b07d2c..c380dde 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v95.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v95.lib.json
index 73cd45f..fb00233 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v95.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ss_n40C_1v95.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_025C_3v30.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_025C_3v30.lib.json
index d22dab8..4eb0420 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_025C_3v30.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_025C_3v30.lib.json
@@ -6,18 +6,22 @@
   "driver_waveform_rise": "ramp",
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_100C_3v30.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_100C_3v30.lib.json
index 0498a91..de4bc44 100644
--- a/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_100C_3v30.lib.json
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_085C_5v50.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_085C_5v50.lib.json
index 4438125..eb128fb 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_085C_5v50.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_085C_5v50.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_100C_5v50.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_100C_5v50.lib.json
index ba5009b..09ef078 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_100C_5v50.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_100C_5v50.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_150C_5v50.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_150C_5v50.lib.json
index bbaaf54..6109d6e 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_150C_5v50.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v40.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v40.lib.json
index 848d375..683a1ff 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v40.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v95.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v95.lib.json
index 21660ff..18849fc 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v95.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_5v50_ccsnoise.lib.json
index f74bc12..007a535 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v65.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v65.lib.json
index 742610b..0e667d4 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v65.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v95.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v95.lib.json
index dabbcba..a5a904f 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v95.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_1v95.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_3v00.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_3v00.lib.json
index 3ee8b65..5c4728e 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_3v00.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_150C_1v65.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_150C_1v65.lib.json
index 135d724..994f453 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_150C_1v65.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v32.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v32.lib.json
index a008457..3af515b 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v32.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v32.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v49.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v49.lib.json
index 5c94d2f..77cb227 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v49.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v49.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v65_ccsnoise.lib.json
index dfe5608..15d182e 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v95.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v95.lib.json
index 946aafe..a38c476 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v95.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__ss_n40C_1v95.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_025C_3v30.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_025C_3v30.lib.json
index c7187d9..038fd8f 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_025C_3v30.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_025C_3v30.lib.json
@@ -6,18 +6,22 @@
   "driver_waveform_rise": "ramp",
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_100C_3v30.lib.json b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_100C_3v30.lib.json
index adb259b..a07996c 100644
--- a/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_100C_3v30.lib.json
+++ b/cells/a21oi/sky130_fd_sc_hvl__a21oi_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_085C_5v50.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_085C_5v50.lib.json
index 3f15bdb..790002a 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_085C_5v50.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_085C_5v50.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_100C_5v50.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_100C_5v50.lib.json
index 7ff031b..7ca301e 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_100C_5v50.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_100C_5v50.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_150C_5v50.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_150C_5v50.lib.json
index 939ede6..0669637 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_150C_5v50.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v40.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v40.lib.json
index dce29b8..47c3f37 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v40.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v95.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v95.lib.json
index bc8d057..52f0df1 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v95.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_5v50_ccsnoise.lib.json
index c07a6e7..172fe58 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v65.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v65.lib.json
index 191e4cd..fea79fd 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v65.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v95.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v95.lib.json
index b676eba..91c038f 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v95.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_1v95.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_3v00.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_3v00.lib.json
index 4d9297c..55b81a1 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_3v00.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_150C_1v65.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_150C_1v65.lib.json
index 3975910..b35a198 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_150C_1v65.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v32.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v32.lib.json
index 3d47203..069a29e 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v32.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v32.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v49.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v49.lib.json
index 8753737..58b3843 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v49.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v49.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v65_ccsnoise.lib.json
index d408d62..0ae9d01 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v95.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v95.lib.json
index 25511cd..74e694f 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v95.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__ss_n40C_1v95.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_025C_3v30.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_025C_3v30.lib.json
index 5694398..27e9e8a 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_025C_3v30.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_025C_3v30.lib.json
@@ -6,18 +6,22 @@
   "driver_waveform_rise": "ramp",
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_100C_3v30.lib.json b/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_100C_3v30.lib.json
index 37ce896..f58f2bb 100644
--- a/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_100C_3v30.lib.json
+++ b/cells/a22o/sky130_fd_sc_hvl__a22o_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_085C_5v50.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_085C_5v50.lib.json
index fe72835..657f131 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_085C_5v50.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_085C_5v50.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_100C_5v50.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_100C_5v50.lib.json
index 200213b..5fb120a 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_100C_5v50.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_100C_5v50.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_150C_5v50.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_150C_5v50.lib.json
index 8f6e0df..1894ba6 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_150C_5v50.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v40.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v40.lib.json
index 93b290a..ea186fa 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v40.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v95.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v95.lib.json
index fc3496f..3a4f55d 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v95.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_5v50_ccsnoise.lib.json
index 7f91cef..88a6e34 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v65.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v65.lib.json
index 88bf47f..9e20ebc 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v65.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v95.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v95.lib.json
index b1678cd..7f4250c 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v95.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_1v95.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_3v00.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_3v00.lib.json
index a5530b6..5a8b97a 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_3v00.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_150C_1v65.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_150C_1v65.lib.json
index f9a2832..230b1f4 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_150C_1v65.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v32.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v32.lib.json
index 76437a9..9138136 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v32.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v32.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v49.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v49.lib.json
index efd482c..3f10140 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v49.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v49.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v65_ccsnoise.lib.json
index e1b19ea..fd8d1e8 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v95.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v95.lib.json
index dc4b266..510f78c 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v95.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__ss_n40C_1v95.lib.json
@@ -72,18 +72,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_025C_3v30.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_025C_3v30.lib.json
index f0ee145..972d0f5 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_025C_3v30.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_025C_3v30.lib.json
@@ -6,18 +6,22 @@
   "driver_waveform_rise": "ramp",
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_100C_3v30.lib.json b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_100C_3v30.lib.json
index 943a1dc..ddb2123 100644
--- a/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_100C_3v30.lib.json
+++ b/cells/a22oi/sky130_fd_sc_hvl__a22oi_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A1": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_085C_5v50.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_085C_5v50.lib.json
index 0963f81..dd36b66 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_085C_5v50.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_085C_5v50.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_100C_5v50.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_100C_5v50.lib.json
index 0887707..753a853 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_100C_5v50.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_100C_5v50.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_150C_5v50.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_150C_5v50.lib.json
index 40998bd..d0fbbc8 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_150C_5v50.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v40.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v40.lib.json
index 4b26494..d55f32d 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v40.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v95.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v95.lib.json
index 5aba155..d215c8d 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v95.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_5v50_ccsnoise.lib.json
index beb062a..bb318cc 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v65.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v65.lib.json
index 71060c4..54dee1c 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v65.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v95.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v95.lib.json
index a4b5946..bba5bdc 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v95.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_1v95.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_3v00.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_3v00.lib.json
index fd3b9b6..832e26d 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_3v00.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_150C_1v65.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_150C_1v65.lib.json
index 44c7725..f1176d3 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_150C_1v65.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v32.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v32.lib.json
index 00f2f9d..94320dd 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v32.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v32.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v49.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v49.lib.json
index ec6569f..7e446ae 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v49.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v49.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v65_ccsnoise.lib.json
index 2476eb7..8d276b6 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v95.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v95.lib.json
index 101f7db..d0a5120 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v95.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__ss_n40C_1v95.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__tt_025C_3v30.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__tt_025C_3v30.lib.json
index 51ccb4b..360579b 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__tt_025C_3v30.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__tt_025C_3v30.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and2/sky130_fd_sc_hvl__and2_1__tt_100C_3v30.lib.json b/cells/and2/sky130_fd_sc_hvl__and2_1__tt_100C_3v30.lib.json
index e1a2e76..8aec43c 100644
--- a/cells/and2/sky130_fd_sc_hvl__and2_1__tt_100C_3v30.lib.json
+++ b/cells/and2/sky130_fd_sc_hvl__and2_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_085C_5v50.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_085C_5v50.lib.json
index eee7d7e..ed73109 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_085C_5v50.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_085C_5v50.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_100C_5v50.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_100C_5v50.lib.json
index b537430..f845471 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_100C_5v50.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_100C_5v50.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_150C_5v50.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_150C_5v50.lib.json
index d38c0b9..20773d4 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_150C_5v50.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v40.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v40.lib.json
index b00056a..523f67b 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v40.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v95.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v95.lib.json
index 8c5e480..d95ab25 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v95.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_5v50_ccsnoise.lib.json
index edd9649..87fe397 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v65.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v65.lib.json
index b5a6163..cc31d82 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v65.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v95.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v95.lib.json
index ecaed9c..7c9f84f 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v95.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_1v95.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_3v00.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_3v00.lib.json
index 9603f82..8b93da4 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_3v00.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_150C_1v65.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_150C_1v65.lib.json
index 26fbf66..86c566d 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_150C_1v65.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v32.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v32.lib.json
index 0814ba3..a1c2889 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v32.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v32.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v49.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v49.lib.json
index f532b29..55395f7 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v49.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v49.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v65_ccsnoise.lib.json
index 4be81e9..5c44d25 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v95.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v95.lib.json
index c2d8cb5..2e22d07 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v95.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__ss_n40C_1v95.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__tt_025C_3v30.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__tt_025C_3v30.lib.json
index 19cb88c..8a947ac 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__tt_025C_3v30.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__tt_025C_3v30.lib.json
@@ -40,18 +40,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/and3/sky130_fd_sc_hvl__and3_1__tt_100C_3v30.lib.json b/cells/and3/sky130_fd_sc_hvl__and3_1__tt_100C_3v30.lib.json
index 0de5307..553fd58 100644
--- a/cells/and3/sky130_fd_sc_hvl__and3_1__tt_100C_3v30.lib.json
+++ b/cells/and3/sky130_fd_sc_hvl__and3_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_085C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_085C_5v50.lib.json
index 3572efe..1292b3b 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_085C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_085C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_100C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_100C_5v50.lib.json
index ef8cf91..0541023 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_100C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_100C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_150C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_150C_5v50.lib.json
index 1836e73..236a5db 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_150C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v40.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v40.lib.json
index b726dc3..e272ad0 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v40.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v95.lib.json
index f1f6c0c..f541b3d 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_5v50_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_5v50_ccsnoise.lib.json
index 863ba1f..546d961 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v65.lib.json
index b73114c..c108bde 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v95.lib.json
index 593f3f7..92ca74c 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_3v00.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_3v00.lib.json
index f807aea..8d35ba8 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_3v00.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_150C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_150C_1v65.lib.json
index 7f4fe1d..6dceff9 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_150C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v32.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v32.lib.json
index 591b1ce..bd6bdcf 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v32.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v32.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v49.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v49.lib.json
index dc603a1..d92ef0a 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v49.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v49.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v65_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v65_ccsnoise.lib.json
index 61946fc..7b01719 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v95.lib.json
index 7bdb09a..3c52f5b 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__ss_n40C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__tt_025C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__tt_025C_3v30.lib.json
index e77fe85..d7d8135 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__tt_025C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__tt_025C_3v30.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_16__tt_100C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_16__tt_100C_3v30.lib.json
index 90d0ccd..c509b42 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_16__tt_100C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_16__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_085C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_085C_5v50.lib.json
index ec1a902..1e592d1 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_085C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_085C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_100C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_100C_5v50.lib.json
index cb5b798..725b1ea 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_100C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_100C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_150C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_150C_5v50.lib.json
index 10d2a56..236e14f 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_150C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v40.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v40.lib.json
index 0599f99..9961c29 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v40.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v95.lib.json
index c625bb8..285c1bd 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_5v50_ccsnoise.lib.json
index 2c7f7ee..13ec2fc 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v65.lib.json
index d926c84..b19c74e 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v95.lib.json
index 0cbfa46..d97521f 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_3v00.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_3v00.lib.json
index 011e8cc..bac9a9e 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_3v00.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_150C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_150C_1v65.lib.json
index ae5f4ff..cfeb7f8 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_150C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v32.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v32.lib.json
index da5418d..3b981b8 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v32.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v32.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v49.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v49.lib.json
index f80478d..333c6c2 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v49.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v49.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v65_ccsnoise.lib.json
index 56b8bd1..63c69e5 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v95.lib.json
index 0a07fe9..16e7cce 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__ss_n40C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__tt_025C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__tt_025C_3v30.lib.json
index 5ec5309..445c270 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__tt_025C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__tt_025C_3v30.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_1__tt_100C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_1__tt_100C_3v30.lib.json
index 621ed40..fc32160 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_1__tt_100C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_085C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_085C_5v50.lib.json
index ff2881a..a2897a9 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_085C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_085C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_100C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_100C_5v50.lib.json
index 958627c..c925c7a 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_100C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_100C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_150C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_150C_5v50.lib.json
index dc52df3..37eb267 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_150C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v40.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v40.lib.json
index dfb0e84..4a640ef 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v40.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v95.lib.json
index 486abd0..39d0e6d 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_5v50_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_5v50_ccsnoise.lib.json
index 1832f85..4eb2301 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v65.lib.json
index a204b32..6b1f86b 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v95.lib.json
index 67a20d8..50b4902 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_3v00.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_3v00.lib.json
index 1a219ad..6609bf3 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_3v00.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_150C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_150C_1v65.lib.json
index 066635f..a115e60 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_150C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v32.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v32.lib.json
index 547c05a..ac4ada7 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v32.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v32.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v49.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v49.lib.json
index c3e5fef..8d910ab 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v49.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v49.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v65_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v65_ccsnoise.lib.json
index 0c0caa4..6a29b40 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v95.lib.json
index 7ed6588..caa9ba2 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__ss_n40C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__tt_025C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__tt_025C_3v30.lib.json
index 74e55ae..e91b7af 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__tt_025C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__tt_025C_3v30.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_2__tt_100C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_2__tt_100C_3v30.lib.json
index 1bdf71e..7df1fe9 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_2__tt_100C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_2__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_085C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_085C_5v50.lib.json
index e4c57ed..218db45 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_085C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_085C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_100C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_100C_5v50.lib.json
index 0422d66..96fedaa 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_100C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_100C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_150C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_150C_5v50.lib.json
index 64c2552..dc93302 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_150C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v40.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v40.lib.json
index e79af08..cad846d 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v40.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v95.lib.json
index 73f32cb..26d6c1e 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_5v50_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_5v50_ccsnoise.lib.json
index 44d4ed8..957f95c 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v65.lib.json
index 83a8cfd..2780530 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v95.lib.json
index 98b3384..580c515 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_3v00.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_3v00.lib.json
index fcb06eb..31e0219 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_3v00.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_150C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_150C_1v65.lib.json
index 9d6e44f..9a5a9c0 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_150C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v32.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v32.lib.json
index 030d98e..63ea984 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v32.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v32.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v49.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v49.lib.json
index 629512b..5f19695 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v49.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v49.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v65_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v65_ccsnoise.lib.json
index 92582c0..6f2b898 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v95.lib.json
index 326c288..10d9236 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__ss_n40C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__tt_025C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__tt_025C_3v30.lib.json
index 5cea6ae..9994c5c 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__tt_025C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__tt_025C_3v30.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_32__tt_100C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_32__tt_100C_3v30.lib.json
index 7003369..998dbe1 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_32__tt_100C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_32__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_085C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_085C_5v50.lib.json
index 197b081..bcc3d69 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_085C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_085C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_100C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_100C_5v50.lib.json
index 5fd9db2..efcf2b0 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_100C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_100C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_150C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_150C_5v50.lib.json
index ca6dda0..5a9d9b5 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_150C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v40.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v40.lib.json
index d0b19f3..25ada86 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v40.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v95.lib.json
index 8dc94d8..b143904 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_5v50_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_5v50_ccsnoise.lib.json
index 2e6076b..6776341 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v65.lib.json
index a0616a4..8c3b77a 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v95.lib.json
index 6db1ce3..5c829b2 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_3v00.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_3v00.lib.json
index 85560ca..ad72139 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_3v00.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_150C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_150C_1v65.lib.json
index 4abbcc3..bf87144 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_150C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v32.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v32.lib.json
index 2becb6e..323c97d 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v32.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v32.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v49.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v49.lib.json
index 788db42..b79d73a 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v49.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v49.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v65_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v65_ccsnoise.lib.json
index da19143..5d52ec7 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v95.lib.json
index c79b0fa..406ab4c 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__ss_n40C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__tt_025C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__tt_025C_3v30.lib.json
index 1e6697d..a99dfea 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__tt_025C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__tt_025C_3v30.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_4__tt_100C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_4__tt_100C_3v30.lib.json
index 85264b8..2742cc4 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_4__tt_100C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_4__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_085C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_085C_5v50.lib.json
index b2b761a..fec0fe2 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_085C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_085C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_100C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_100C_5v50.lib.json
index af56b31..0094eb9 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_100C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_100C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_150C_5v50.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_150C_5v50.lib.json
index a0e7012..6c83711 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_150C_5v50.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v40.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v40.lib.json
index 4b040bc..883f19a 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v40.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v95.lib.json
index 2b1f92c..e2ca06f 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_5v50_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_5v50_ccsnoise.lib.json
index b7ad370..c88d402 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v65.lib.json
index 4633ece..530073b 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v95.lib.json
index 2321ec0..13c562f 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_3v00.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_3v00.lib.json
index b567001..530534f 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_3v00.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_150C_1v65.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_150C_1v65.lib.json
index eea361e..4af9b77 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_150C_1v65.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v32.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v32.lib.json
index 6d948ac..14e9c96 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v32.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v32.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v49.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v49.lib.json
index bf2a7f8..6e1880e 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v49.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v49.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v65_ccsnoise.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v65_ccsnoise.lib.json
index fb4aa54..41e02d0 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v95.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v95.lib.json
index b673783..574add9 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v95.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__ss_n40C_1v95.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__tt_025C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__tt_025C_3v30.lib.json
index 43a11fc..6354bf9 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__tt_025C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__tt_025C_3v30.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/buf/sky130_fd_sc_hvl__buf_8__tt_100C_3v30.lib.json b/cells/buf/sky130_fd_sc_hvl__buf_8__tt_100C_3v30.lib.json
index 3a4898d..ca1fc42 100644
--- a/cells/buf/sky130_fd_sc_hvl__buf_8__tt_100C_3v30.lib.json
+++ b/cells/buf/sky130_fd_sc_hvl__buf_8__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_085C_5v50.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_085C_5v50.lib.json
index 438a1bd..cb71fb6 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_085C_5v50.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_085C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.03089393,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_100C_5v50.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_100C_5v50.lib.json
index 8e6db6f..ed02ed2 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_100C_5v50.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_100C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.03347125,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_150C_5v50.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_150C_5v50.lib.json
index ca66452..34daaf8 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_150C_5v50.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v40.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v40.lib.json
index d485acc..c13a1db 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v40.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v95.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v95.lib.json
index d485acc..c13a1db 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v95.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_5v50_ccsnoise.lib.json
index 36b84f1..c5917ca 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v65.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v65.lib.json
index f621ab4..f047707 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v65.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v95.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v95.lib.json
index 3004ad8..0a5fccc 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v95.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_1v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.004944581,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_3v00.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_3v00.lib.json
index f621ab4..f047707 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_3v00.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_150C_1v65.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_150C_1v65.lib.json
index ca66452..34daaf8 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_150C_1v65.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v32.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v32.lib.json
index 644ea59..c7f4aef 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v32.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v32.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0017424,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v49.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v49.lib.json
index 04db752..e7e51d0 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v49.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v49.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0022201,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v65_ccsnoise.lib.json
index 36b84f1..c5917ca 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v95.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v95.lib.json
index 656fb54..7f85280 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v95.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__ss_n40C_1v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0038025,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__tt_025C_3v30.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__tt_025C_3v30.lib.json
index 6a6fc29..ff24c9f 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__tt_025C_3v30.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__tt_025C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 1.19e-05,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/conb/sky130_fd_sc_hvl__conb_1__tt_100C_3v30.lib.json b/cells/conb/sky130_fd_sc_hvl__conb_1__tt_100C_3v30.lib.json
index f621ab4..f047707 100644
--- a/cells/conb/sky130_fd_sc_hvl__conb_1__tt_100C_3v30.lib.json
+++ b/cells/conb/sky130_fd_sc_hvl__conb_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,HI": {
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_085C_5v50.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_085C_5v50.lib.json
index 0a58175..e29d549 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_085C_5v50.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_085C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.03082194,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_100C_5v50.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_100C_5v50.lib.json
index d1bf447..1b49a80 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_100C_5v50.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_100C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.03311112,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_150C_5v50.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_150C_5v50.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_150C_5v50.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v40.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v40.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v40.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v95.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v95.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v95.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_5v50_ccsnoise.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_5v50_ccsnoise.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v65.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v65.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v65.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v95.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v95.lib.json
index 94a825c..a45ff9a 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v95.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_1v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.004816899,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_3v00.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_3v00.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_3v00.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_150C_1v65.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_150C_1v65.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_150C_1v65.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v32.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v32.lib.json
index a449553..f9b170a 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v32.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v32.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0017424,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v49.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v49.lib.json
index a40165a..def0dd6 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v49.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v49.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0022201,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v65_ccsnoise.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v65_ccsnoise.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v95.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v95.lib.json
index a554463..c40359a 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v95.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__ss_n40C_1v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0038025,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__tt_025C_3v30.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__tt_025C_3v30.lib.json
index 4eb1b21..cb1f0c0 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__tt_025C_3v30.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__tt_025C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 1.1e-05,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_4__tt_100C_3v30.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_4__tt_100C_3v30.lib.json
index c6a3772..2786ad2 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_4__tt_100C_3v30.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_4__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_085C_5v50.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_085C_5v50.lib.json
index bc9614b..bd8b5d4 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_085C_5v50.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_085C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.03110989,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_100C_5v50.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_100C_5v50.lib.json
index ac6896f..1cd83d4 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_100C_5v50.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_100C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.03455164,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_150C_5v50.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_150C_5v50.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_150C_5v50.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v40.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v40.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v40.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v95.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v95.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v95.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_5v50_ccsnoise.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_5v50_ccsnoise.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v65.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v65.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v65.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v95.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v95.lib.json
index 09d7e2d..16ad0d4 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v95.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_1v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.005327628,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_3v00.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_3v00.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_3v00.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_150C_1v65.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_150C_1v65.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_150C_1v65.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v32.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v32.lib.json
index 5a03733..d573d09 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v32.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v32.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0017424,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v49.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v49.lib.json
index 9af598c..f183c52 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v49.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v49.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0022201,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v65_ccsnoise.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v65_ccsnoise.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v95.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v95.lib.json
index bd4e846..20712e1 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v95.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__ss_n40C_1v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0038025,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__tt_025C_3v30.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__tt_025C_3v30.lib.json
index 5b42838..ff0742b 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__tt_025C_3v30.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__tt_025C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 1.11e-05,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/decap/sky130_fd_sc_hvl__decap_8__tt_100C_3v30.lib.json b/cells/decap/sky130_fd_sc_hvl__decap_8__tt_100C_3v30.lib.json
index 17f2a9f..9fb7711 100644
--- a/cells/decap/sky130_fd_sc_hvl__decap_8__tt_100C_3v30.lib.json
+++ b/cells/decap/sky130_fd_sc_hvl__decap_8__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   }
 }
\ No newline at end of file
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_085C_5v50.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_085C_5v50.lib.json
index 33f97ab..cd8cdc3 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_085C_5v50.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_085C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_100C_5v50.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_100C_5v50.lib.json
index 2de6f6c..129fa51 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_100C_5v50.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_100C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_150C_5v50.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_150C_5v50.lib.json
index 410405d..62acbc9 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_150C_5v50.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_150C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v40.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v40.lib.json
index c4bbf14..2468ae6 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v40.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v40.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v95.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v95.lib.json
index 77ae39c..206a9ec 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v95.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_4v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_5v50_ccsnoise.lib.json
index 833f2d4..f42735d 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -43,18 +43,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v65.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v65.lib.json
index 5c5e9c6..2127bb3 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v65.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v95.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v95.lib.json
index 30ffa44..43ad0c4 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v95.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_3v00.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_3v00.lib.json
index 9687605..d4cbe92 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_3v00.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_100C_3v00.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_150C_1v65.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_150C_1v65.lib.json
index 9c6b021..f045349 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_150C_1v65.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_150C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v32.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v32.lib.json
index d4c6d5f..5b10db5 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v32.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v32.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v49.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v49.lib.json
index f73ed65..20803e9 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v49.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v49.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v65_ccsnoise.lib.json
index 5c19da3..7df60f5 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v95.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v95.lib.json
index 8984315..d6cc99b 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v95.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__ss_n40C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_025C_3v30.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_025C_3v30.lib.json
index 10bd5a7..0e176f0 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_025C_3v30.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_025C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_100C_3v30.lib.json b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_100C_3v30.lib.json
index 65f118d..f6e54b5 100644
--- a/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_100C_3v30.lib.json
+++ b/cells/dfrbp/sky130_fd_sc_hvl__dfrbp_1__tt_100C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_085C_5v50.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_085C_5v50.lib.json
index d46e961..3877df2 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_085C_5v50.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_085C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_100C_5v50.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_100C_5v50.lib.json
index 7eafb95..44acc6e 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_100C_5v50.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_100C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_150C_5v50.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_150C_5v50.lib.json
index e911a72..d1538d9 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_150C_5v50.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_150C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v40.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v40.lib.json
index 0daba29..1821de9 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v40.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v40.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v95.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v95.lib.json
index 524b121..c1f1bee 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v95.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_4v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_5v50_ccsnoise.lib.json
index eb4cf02..4aa0808 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -43,18 +43,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v65.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v65.lib.json
index 685e3ca..df92161 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v65.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v95.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v95.lib.json
index 70c7911..1f06c4d 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v95.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_3v00.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_3v00.lib.json
index 6e2007a..8094a38 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_3v00.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_100C_3v00.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_150C_1v65.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_150C_1v65.lib.json
index afee058..58b9b7e 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_150C_1v65.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_150C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v32.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v32.lib.json
index 0e7e28f..590b146 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v32.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v32.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v49.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v49.lib.json
index 4a5fa1b..d37053a 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v49.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v49.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v65_ccsnoise.lib.json
index 73a53d6..4b6883b 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v95.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v95.lib.json
index 873d6e7..5957773 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v95.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__ss_n40C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_025C_3v30.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_025C_3v30.lib.json
index 75091e1..609a6d5 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_025C_3v30.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_025C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_100C_3v30.lib.json b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_100C_3v30.lib.json
index 3f6a633..ce33281 100644
--- a/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_100C_3v30.lib.json
+++ b/cells/dfrtp/sky130_fd_sc_hvl__dfrtp_1__tt_100C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_085C_5v50.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_085C_5v50.lib.json
index da0d9fa..1b8c80e 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_085C_5v50.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_085C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_100C_5v50.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_100C_5v50.lib.json
index fb1d815..92b0f00 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_100C_5v50.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_100C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_150C_5v50.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_150C_5v50.lib.json
index 15caeef..9180be7 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_150C_5v50.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_150C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v40.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v40.lib.json
index 1c958e6..538c698 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v40.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v40.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v95.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v95.lib.json
index 642b79a..ec8a842 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v95.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_4v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_5v50_ccsnoise.lib.json
index 8031b76..5d812ea 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -43,18 +43,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v65.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v65.lib.json
index 7d944a4..851590b 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v65.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v95.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v95.lib.json
index 70f7523..1010c2a 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v95.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_3v00.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_3v00.lib.json
index ab609cf..100de28 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_3v00.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_100C_3v00.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_150C_1v65.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_150C_1v65.lib.json
index dce7c34..1876a61 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_150C_1v65.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_150C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v32.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v32.lib.json
index 9257572..40cb23a 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v32.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v32.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v49.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v49.lib.json
index 9e12e7b..06eb8df 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v49.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v49.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v65_ccsnoise.lib.json
index cf4dcdd..f473039 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v95.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v95.lib.json
index 81bf645..5bda812 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v95.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__ss_n40C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_025C_3v30.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_025C_3v30.lib.json
index a7884e8..5cb90cf 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_025C_3v30.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_025C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_100C_3v30.lib.json b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_100C_3v30.lib.json
index 46345a7..8413782 100644
--- a/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_100C_3v30.lib.json
+++ b/cells/dfsbp/sky130_fd_sc_hvl__dfsbp_1__tt_100C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_085C_5v50.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_085C_5v50.lib.json
index 43227a2..0da9415 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_085C_5v50.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_085C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_100C_5v50.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_100C_5v50.lib.json
index e06a7a6..ab44c66 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_100C_5v50.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_100C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_150C_5v50.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_150C_5v50.lib.json
index 54ec0ce..8ee6ca8 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_150C_5v50.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_150C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v40.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v40.lib.json
index c3b82b5..19a8398 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v40.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v40.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v95.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v95.lib.json
index 44f7d5b..e80d70a 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v95.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_4v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_5v50_ccsnoise.lib.json
index b125dce..be19734 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -43,18 +43,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v65.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v65.lib.json
index 188a1da..44e1004 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v65.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v95.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v95.lib.json
index 26c63db..efaa778 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v95.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_3v00.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_3v00.lib.json
index f4118c0..50118ad 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_3v00.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_100C_3v00.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_150C_1v65.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_150C_1v65.lib.json
index 346155f..f7ac137 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_150C_1v65.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_150C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v32.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v32.lib.json
index ef521cb..b02b7c2 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v32.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v32.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v49.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v49.lib.json
index 82d65bf..dfa343c 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v49.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v49.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v65_ccsnoise.lib.json
index 135462d..f5f1d2f 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v95.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v95.lib.json
index 08a79f7..044c2b3 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v95.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__ss_n40C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_025C_3v30.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_025C_3v30.lib.json
index b2968d2..2146c20 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_025C_3v30.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_025C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_100C_3v30.lib.json b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_100C_3v30.lib.json
index 92127cf..0b937e6 100644
--- a/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_100C_3v30.lib.json
+++ b/cells/dfstp/sky130_fd_sc_hvl__dfstp_1__tt_100C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_085C_5v50.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_085C_5v50.lib.json
index 01d2884..f51e4f6 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_085C_5v50.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_085C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_100C_5v50.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_100C_5v50.lib.json
index 39aff15..5f8dc00 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_100C_5v50.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_100C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_150C_5v50.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_150C_5v50.lib.json
index 4627c73..1b66b31 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_150C_5v50.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_150C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v40.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v40.lib.json
index 8292bd1..a46748e 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v40.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v40.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v95.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v95.lib.json
index ba29669..c4a63e8 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v95.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_4v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_5v50_ccsnoise.lib.json
index bd1ee53..3eedd77 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -26,18 +26,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v65.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v65.lib.json
index c182063..b0141b9 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v65.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v65.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v95.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v95.lib.json
index 2e91b93..ac599c1 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v95.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_1v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_3v00.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_3v00.lib.json
index 691a358..237bf7b 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_3v00.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_100C_3v00.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_150C_1v65.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_150C_1v65.lib.json
index 4bb7b7c..f46c869 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_150C_1v65.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_150C_1v65.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v32.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v32.lib.json
index f1aa2f6..849c5c6 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v32.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v32.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v49.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v49.lib.json
index b768d82..81ff6ab 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v49.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v49.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v65_ccsnoise.lib.json
index d08e9b2..2169bfd 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v95.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v95.lib.json
index fa96e35..4886479 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v95.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__ss_n40C_1v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_025C_3v30.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_025C_3v30.lib.json
index 868ce8f..d266f69 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_025C_3v30.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_025C_3v30.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_100C_3v30.lib.json b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_100C_3v30.lib.json
index 0b3d042..7d2d860 100644
--- a/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_100C_3v30.lib.json
+++ b/cells/dfxbp/sky130_fd_sc_hvl__dfxbp_1__tt_100C_3v30.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_085C_5v50.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_085C_5v50.lib.json
index 4bb6c9c..5453ba8 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_085C_5v50.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_085C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_100C_5v50.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_100C_5v50.lib.json
index 42e69cc..90a52fc 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_100C_5v50.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_100C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_150C_5v50.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_150C_5v50.lib.json
index 9c00581..b7de777 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_150C_5v50.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_150C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v40.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v40.lib.json
index 1200bb4..ebac071 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v40.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v40.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v95.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v95.lib.json
index 8c5b370..ebb97b4 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v95.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_4v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_5v50_ccsnoise.lib.json
index 70e30b8..045e6e4 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -26,18 +26,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v65.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v65.lib.json
index 6502a16..de1efcc 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v65.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v65.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v95.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v95.lib.json
index 2a38238..eb31a4e 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v95.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_1v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_3v00.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_3v00.lib.json
index 362aec2..bb61611 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_3v00.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_100C_3v00.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_150C_1v65.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_150C_1v65.lib.json
index 7c51099..a37f0b6 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_150C_1v65.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_150C_1v65.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v32.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v32.lib.json
index ed78c83..6c49a6c 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v32.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v32.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v49.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v49.lib.json
index abb2e6b..76a9579 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v49.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v49.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v65_ccsnoise.lib.json
index 0d8267f..87f440a 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v95.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v95.lib.json
index d017527..a08cdbc 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v95.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__ss_n40C_1v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_025C_3v30.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_025C_3v30.lib.json
index b10d057..b410a1a 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_025C_3v30.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_025C_3v30.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_100C_3v30.lib.json b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_100C_3v30.lib.json
index 3bd780d..774462a 100644
--- a/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_100C_3v30.lib.json
+++ b/cells/dfxtp/sky130_fd_sc_hvl__dfxtp_1__tt_100C_3v30.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_085C_5v50.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_085C_5v50.lib.json
index 55c872f..ec5523d 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_085C_5v50.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_085C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_100C_5v50.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_100C_5v50.lib.json
index cc479cf..deead89 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_100C_5v50.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_100C_5v50.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_150C_5v50.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_150C_5v50.lib.json
index cb4181a..8adaa9d 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_150C_5v50.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v40.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v40.lib.json
index a02471c..7607156 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v40.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v95.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v95.lib.json
index 9ea3de3..cb726af 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v95.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_5v50_ccsnoise.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_5v50_ccsnoise.lib.json
index d350656..0e4ef6b 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v65.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v65.lib.json
index 8122ac3..f1d07d9 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v65.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v95.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v95.lib.json
index 5437343..b14fa21 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v95.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_1v95.lib.json
@@ -10,18 +10,22 @@
   },
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_3v00.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_3v00.lib.json
index 7ae6b32..7635389 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_3v00.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_150C_1v65.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_150C_1v65.lib.json
index 6cae7f3..1a45017 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_150C_1v65.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v32.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v32.lib.json
index 15295e0..6d748eb 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v32.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v32.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v49.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v49.lib.json
index 38a6188..c088978 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v49.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v49.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v65_ccsnoise.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v65_ccsnoise.lib.json
index 2e61da4..bd8c595 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v95.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v95.lib.json
index c96a247..b0c0abf 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v95.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__ss_n40C_1v95.lib.json
@@ -10,18 +10,22 @@
   },
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__tt_025C_3v30.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__tt_025C_3v30.lib.json
index 15ef785..da12161 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__tt_025C_3v30.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__tt_025C_3v30.lib.json
@@ -16,18 +16,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/diode/sky130_fd_sc_hvl__diode_2__tt_100C_3v30.lib.json b/cells/diode/sky130_fd_sc_hvl__diode_2__tt_100C_3v30.lib.json
index 417e130..a71e702 100644
--- a/cells/diode/sky130_fd_sc_hvl__diode_2__tt_100C_3v30.lib.json
+++ b/cells/diode/sky130_fd_sc_hvl__diode_2__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,DIODE": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_085C_5v50.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_085C_5v50.lib.json
index bed76b6..7757bb5 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_085C_5v50.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_085C_5v50.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_100C_5v50.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_100C_5v50.lib.json
index e6e3446..f1d689c 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_100C_5v50.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_100C_5v50.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_150C_5v50.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_150C_5v50.lib.json
index 650d56c..c20fa30 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_150C_5v50.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_150C_5v50.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v40.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v40.lib.json
index 05c8e67..eed3496 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v40.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v40.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v95.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v95.lib.json
index 9df9c31..39f3d04 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v95.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_4v95.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_5v50_ccsnoise.lib.json
index 4758f12..0154bfb 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -23,18 +23,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v65.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v65.lib.json
index bb06555..e711fda 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v65.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v65.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v95.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v95.lib.json
index cde20b8..7670e7a 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v95.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_1v95.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_3v00.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_3v00.lib.json
index fac473b..cb81436 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_3v00.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_100C_3v00.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_150C_1v65.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_150C_1v65.lib.json
index ea0e5ef..2f1ce74 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_150C_1v65.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_150C_1v65.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v32.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v32.lib.json
index 143d17c..f32f9cc 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v32.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v32.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v49.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v49.lib.json
index d2e4e43..df55774 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v49.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v49.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v65_ccsnoise.lib.json
index d35655d..033c4d9 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v95.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v95.lib.json
index 57a9fa2..8dc909e 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v95.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__ss_n40C_1v95.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_025C_3v30.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_025C_3v30.lib.json
index e9686b2..fa3e211 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_025C_3v30.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_025C_3v30.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_100C_3v30.lib.json b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_100C_3v30.lib.json
index 105f7ba..71dabb3 100644
--- a/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_100C_3v30.lib.json
+++ b/cells/dlclkp/sky130_fd_sc_hvl__dlclkp_1__tt_100C_3v30.lib.json
@@ -25,18 +25,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,CLK": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_085C_5v50.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_085C_5v50.lib.json
index e9a8810..733327b 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_085C_5v50.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_085C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_100C_5v50.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_100C_5v50.lib.json
index 3625024..4dd745c 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_100C_5v50.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_100C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_150C_5v50.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_150C_5v50.lib.json
index be69be7..3223608 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_150C_5v50.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_150C_5v50.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v40.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v40.lib.json
index e2ee508..3c25920 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v40.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v40.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v95.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v95.lib.json
index 551e875..08d57a8 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v95.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_4v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_5v50_ccsnoise.lib.json
index 29b7a3f..24baa7c 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -43,18 +43,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v65.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v65.lib.json
index 760e149..12eb90a 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v65.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v95.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v95.lib.json
index 8ab41d8..02f9426 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v95.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_3v00.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_3v00.lib.json
index b40555e..e725493 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_3v00.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_100C_3v00.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_150C_1v65.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_150C_1v65.lib.json
index 97e86ed..958c80b 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_150C_1v65.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_150C_1v65.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v32.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v32.lib.json
index 2504168..f89d248 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v32.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v32.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v49.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v49.lib.json
index bf2363c..3d2e2d5 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v49.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v49.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v65_ccsnoise.lib.json
index 3e2b115..e0b5712 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v95.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v95.lib.json
index 35a4cba..c13f535 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v95.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__ss_n40C_1v95.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_025C_3v30.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_025C_3v30.lib.json
index cee2b60..cdd1d66 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_025C_3v30.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_025C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_100C_3v30.lib.json b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_100C_3v30.lib.json
index 4bb8ab7..96f9ac4 100644
--- a/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_100C_3v30.lib.json
+++ b/cells/dlrtp/sky130_fd_sc_hvl__dlrtp_1__tt_100C_3v30.lib.json
@@ -45,18 +45,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_085C_5v50.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_085C_5v50.lib.json
index 275154d..7dcf2d2 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_085C_5v50.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_085C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_100C_5v50.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_100C_5v50.lib.json
index ffe9317..56f4175 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_100C_5v50.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_100C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_150C_5v50.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_150C_5v50.lib.json
index 48e9b40..6b51caf 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_150C_5v50.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_150C_5v50.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v40.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v40.lib.json
index ec633c8..5c9f65f 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v40.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v40.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v95.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v95.lib.json
index e1edccb..c916f1f 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v95.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_4v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_5v50_ccsnoise.lib.json
index 66d3ede..06119ce 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -26,18 +26,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v65.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v65.lib.json
index 25c7971..7c0d540 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v65.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v65.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v95.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v95.lib.json
index f038d36..1ddbec0 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v95.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_1v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_3v00.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_3v00.lib.json
index c7cb057..c3a4730 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_3v00.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_100C_3v00.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_150C_1v65.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_150C_1v65.lib.json
index 3c7e34f..ded0d4b 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_150C_1v65.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_150C_1v65.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v32.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v32.lib.json
index 78cc84a..ad439cf 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v32.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v32.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v49.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v49.lib.json
index 28d7173..26cbbb5 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v49.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v49.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v65_ccsnoise.lib.json
index 0bddee2..99539ef 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v95.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v95.lib.json
index 4fd24e1..136a40b 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v95.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__ss_n40C_1v95.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_025C_3v30.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_025C_3v30.lib.json
index 61b4de0..196ae5c 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_025C_3v30.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_025C_3v30.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_100C_3v30.lib.json b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_100C_3v30.lib.json
index c15727f..c643f0e 100644
--- a/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_100C_3v30.lib.json
+++ b/cells/dlxtp/sky130_fd_sc_hvl__dlxtp_1__tt_100C_3v30.lib.json
@@ -28,18 +28,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,D": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_085C_5v50.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_085C_5v50.lib.json
index c6326f8..e8ee8fb 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_085C_5v50.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_085C_5v50.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_100C_5v50.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_100C_5v50.lib.json
index 7c46556..e42ee41 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_100C_5v50.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_100C_5v50.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_150C_5v50.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_150C_5v50.lib.json
index 88a9e02..f893547 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_150C_5v50.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v40.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v40.lib.json
index 62d17a0..b2cac79 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v40.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v95.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v95.lib.json
index 1d717b4..2acac4e 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v95.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_5v50_ccsnoise.lib.json
index 24f8123..2338999 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v65.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v65.lib.json
index a9d5891..be67e3e 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v65.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v95.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v95.lib.json
index 2553964..bff3aaf 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v95.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_1v95.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_3v00.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_3v00.lib.json
index 451783f..5b6c326 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_3v00.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_100C_3v00.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_150C_1v65.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_150C_1v65.lib.json
index 0213b1d..90592d6 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_150C_1v65.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_150C_1v65.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v32.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v32.lib.json
index 61f9d6a..d9386b4 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v32.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v32.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v49.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v49.lib.json
index 8b875a2..17fb375 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v49.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v49.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v65_ccsnoise.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v65_ccsnoise.lib.json
index 45fbdc5..119700c 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v65_ccsnoise.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v65_ccsnoise.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v95.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v95.lib.json
index bc11039..b1580a1 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v95.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__ss_n40C_1v95.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_025C_3v30.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_025C_3v30.lib.json
index 97af636..c266981 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_025C_3v30.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_025C_3v30.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_100C_3v30.lib.json b/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_100C_3v30.lib.json
index ce615a5..4a637a4 100644
--- a/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_100C_3v30.lib.json
+++ b/cells/einvn/sky130_fd_sc_hvl__einvn_1__tt_100C_3v30.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_085C_5v50.lib.json b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_085C_5v50.lib.json
index 7b5a08b..ea1c1e5 100644
--- a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_085C_5v50.lib.json
+++ b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_085C_5v50.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_100C_5v50.lib.json b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_100C_5v50.lib.json
index 6b7b140..68e2562 100644
--- a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_100C_5v50.lib.json
+++ b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_100C_5v50.lib.json
@@ -24,18 +24,22 @@
   ],
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_150C_5v50.lib.json b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_150C_5v50.lib.json
index 96292f1..3ee848a 100644
--- a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_150C_5v50.lib.json
+++ b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_150C_5v50.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v40.lib.json b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v40.lib.json
index 81ad42e..02a7038 100644
--- a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v40.lib.json
+++ b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v40.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v95.lib.json b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v95.lib.json
index 96ee66c..39fbcab 100644
--- a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v95.lib.json
+++ b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_4v95.lib.json
@@ -4,18 +4,22 @@
   "cell_leakage_power": 0.0,
   "pg_pin,VGND": {
     "pg_type": "primary_ground",
+    "related_bias_pin": "VPB",
     "voltage_name": "VGND"
   },
   "pg_pin,VNB": {
-    "pg_type": "pwell",
+    "pg_type": "nwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VNB"
   },
   "pg_pin,VPB": {
-    "pg_type": "nwell",
+    "pg_type": "pwell",
+    "physical_connection": "device_layer",
     "voltage_name": "VPB"
   },
   "pg_pin,VPWR": {
     "pg_type": "primary_power",
+    "related_bias_pin": "VNB",
     "voltage_name": "VPWR"
   },
   "pin,A": {
diff --git a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_5v50_ccsnoise.lib.json b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_5v50_ccsnoise.lib.json
index 1f5164d..83b0d1d 100644
--- a/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_5v50_ccsnoise.lib.json
+++ b/cells/einvp/sky130_fd_sc_hvl__einvp_1__ff_n40C_5v50_ccsnoise.lib.json
@@ -4,18 +4,22 @@