tree 6fe3baa3feafd6dac48c7fab2dbf6b951ceeb684
parent 816a15783e0751d784bcd504915c0019ac56b8f3
parent 52f30ef0ec41942bebd2ae8c9fc41ecd177762a7
author Tim 'mithro' Ansell <me@mith.ro> 1603940876 -0700
committer Tim 'mithro' Ansell <tansell@google.com> 1603940876 -0700

verilog: Fixing power pins usage in non-powerpin mode.

Previously even when `USE_POWER_PIN` was not defined, the drive strength
wrappers where still defining the power pins as ports.

Fixes https://github.com/google/skywater-pdk/issues/181

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>