| { | |
| "area": 68.376, | |
| "cell_footprint": "sky130_fd_sc_hvl__dfrbp", | |
| "cell_leakage_power": 3.728329, | |
| "driver_waveform_fall": "ramp", | |
| "driver_waveform_rise": "ramp", | |
| "ff,IQ,IQ_N": { | |
| "clear": "!RESET_B", | |
| "clocked_on": "CLK", | |
| "next_state": "D" | |
| }, | |
| "leakage_power": [ | |
| { | |
| "value": 5.0356714, | |
| "when": "D&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 4.0794585, | |
| "when": "!D&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 2.7805025, | |
| "when": "!D&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 4.7232831, | |
| "when": "!D&RESET_B&CLK" | |
| }, | |
| { | |
| "value": 3.8553742, | |
| "when": "D&RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 3.2714766, | |
| "when": "D&!RESET_B&CLK" | |
| }, | |
| { | |
| "value": 2.7949434, | |
| "when": "!D&!RESET_B&!CLK" | |
| }, | |
| { | |
| "value": 3.2859193, | |
| "when": "D&!RESET_B&!CLK" | |
| } | |
| ], | |
| "pg_pin,VGND": { | |
| "pg_type": "primary_ground", | |
| "related_bias_pin": "VPB", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin,VNB": { | |
| "pg_type": "nwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin,VPB": { | |
| "pg_type": "pwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VPB" | |
| }, | |
| "pg_pin,VPWR": { | |
| "pg_type": "primary_power", | |
| "related_bias_pin": "VNB", | |
| "voltage_name": "VPWR" | |
| }, | |
| "pin,CLK": { | |
| "capacitance": 0.002235, | |
| "clock": "true", | |
| "direction": "input", | |
| "fall_capacitance": 0.002179, | |
| "internal_power": { | |
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| } | |
| }, | |
| "max_transition": 3.75, | |
| "min_pulse_width_high": 0.685075, | |
| "min_pulse_width_low": 0.814712, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002292 | |
| }, | |
| "pin,D": { | |
| "capacitance": 0.002169, | |
| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.002127, | |
| "internal_power": { | |
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| 0.044441 | |
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| }, | |
| "max_transition": 3.75, | |
| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.002211, | |
| "timing": [ | |
| { | |
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| }, | |
| "related_pin": "CLK", | |
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| }, | |
| "sim_opt": "runlvl=5 accurate=1", | |
| "timing_type": "setup_rising", | |
| "violation_delay_degrade_pct": 10 | |
| }, | |
| { | |
| "fall_constraint,vio_11_11_1": { | |
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| ] | |
| }, | |
| "related_pin": "CLK", | |
| "rise_constraint,vio_11_11_1": { | |
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