blob: 0d4056306d748a8ea82c35ed8c997cad2aa8d405 [file] [log] [blame]
{
"bus_naming_style": "%s[%d]",
"comp_attribute capacitive_load_unit": [
1.0,
"pf"
],
"comp_attribute library_features": "report_delay_calculation",
"comp_attribute technology": "cmos",
"comp_attribute voltage_map": {
"VGND": 0.0,
"VNB": 0.0
},
"current_unit": "1mA",
"default_cell_leakage_power": 0.0,
"default_constraint_arc_mode": "worst",
"default_inout_pin_cap": 0.0,
"default_input_pin_cap": 0.0,
"default_leakage_power_density": 0.0,
"default_max_transition": 3.75,
"default_output_pin_cap": 0.0,
"delay_model": "table_lookup",
"in_place_swap_mode": "match_footprint",
"input_threshold_pct_fall": 50.0,
"input_threshold_pct_rise": 50.0,
"lu_table_template driver_waveform_template": {
"index_1": [
1,
2
],
"index_2": [
1,
2
],
"variable_1": "input_net_transition",
"variable_2": "normalized_voltage"
},
"min_pulse_width_mode": "max",
"nom_process": 1.0,
"output_threshold_pct_fall": 50.0,
"output_threshold_pct_rise": 50.0,
"pulling_resistance_unit": "1kohm",
"revision": 1.0,
"simulation": "true",
"slew_lower_threshold_pct_fall": 20.0,
"slew_lower_threshold_pct_rise": 20.0,
"slew_upper_threshold_pct_fall": 80.0,
"slew_upper_threshold_pct_rise": 80.0,
"switching_power_split_model": "true",
"time_unit": "1ns",
"voltage_unit": "1V"
}