Significant improvements to library sky130_fd_sc_hvl version 0.0.1.
This commit contains major improvements to all files by regenerating
from original data, improving consistency and automated cross checking
of data.
These improvements should drastically reduce customer confusion when
using the library and further reduce future possibility for human errors to
creep into designs.
Notable improvements include;
* A large number of files have been regenerated from original source
data including most liberty timing files and spice simulation models
(compared to previous hand created versions).
* Catalog and other library aggregations are now automatically
generated from library contents (compared to previous hand created
versions).
* Significant improvements to documentation for all cells, including
producing graphical representations, verified metadata and
descriptions.
* Names have been cross referenced between file types (such as
simulation, layout, schematic and timing) and now verified to match.
* Names have been improved to fix a standard format across all supported
libraries and PDK contents.
* Significant improvements to the contents of text files (like the
verilog files) through improving consistent style that has been
automatically checked.
* Simplified verilog files for usage with open tools, including new
black box stubs have been created.
* Too many numerous other changes to list here.
Signed-off-by: Kevin Kelley <kevin.kelley@skywatertechnology.com>
diff --git a/README.rst b/README.rst
index fc80cb8..6b78cea 100644
--- a/README.rst
+++ b/README.rst
@@ -1,5 +1,5 @@
:lib:`sky130_fd_sc_hvl` - SKY130 High Voltage Digital Standard Cells (SkyWater Provided)
========================================================================================
-Initial empty repository creation.
+Initial release of version (0, 0, 0).
diff --git a/cells/a21o/definition.json b/cells/a21o/definition.json
new file mode 100644
index 0000000..9d8a6c0
--- /dev/null
+++ b/cells/a21o/definition.json
@@ -0,0 +1,60 @@
+{
+ "description": "2-input AND into first input of 2-input OR.",
+ "equation": "X = ((A1 & A2) | B1)",
+ "file_prefix": "sky130_fd_sc_hvl__a21o",
+ "library": "sky130_fd_sc_hvl",
+ "name": "a21o",
+ "parameters": [],
+ "ports": [
+ [
+ "signal",
+ "X",
+ "output",
+ ""
+ ],
+ [
+ "signal",
+ "A1",
+ "input",
+ ""
+ ],
+ [
+ "signal",
+ "A2",
+ "input",
+ ""
+ ],
+ [
+ "signal",
+ "B1",
+ "input",
+ ""
+ ],
+ [
+ "power",
+ "VPWR",
+ "input",
+ "supply1"
+ ],
+ [
+ "power",
+ "VGND",
+ "input",
+ "supply0"
+ ],
+ [
+ "power",
+ "VPB",
+ "input",
+ "supply1"
+ ],
+ [
+ "power",
+ "VNB",
+ "input",
+ "supply0"
+ ]
+ ],
+ "type": "cell",
+ "verilog_name": "sky130_fd_sc_hvl__a21o"
+}
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.behavioral.pp.v b/cells/a21o/sky130_fd_sc_hvl__a21o.behavioral.pp.v
new file mode 100644
index 0000000..50586d0
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.behavioral.pp.v
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HVL__A21O_BEHAVIORAL_PP_V
+`define SKY130_FD_SC_HVL__A21O_BEHAVIORAL_PP_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+// Import user defined primitives.
+`include "../../models/udp_pwrgood_pp_pg/sky130_fd_sc_hvl__udp_pwrgood_pp_pg.v"
+
+`celldefine
+module sky130_fd_sc_hvl__a21o (
+ X ,
+ A1 ,
+ A2 ,
+ B1 ,
+ VPWR,
+ VGND,
+ VPB ,
+ VNB
+);
+
+ // Module ports
+ output X ;
+ input A1 ;
+ input A2 ;
+ input B1 ;
+ input VPWR;
+ input VGND;
+ input VPB ;
+ input VNB ;
+
+ // Local signals
+ wire and0_out ;
+ wire or0_out_X ;
+ wire pwrgood_pp0_out_X;
+
+ // Name Output Other arguments
+ and and0 (and0_out , A1, A2 );
+ or or0 (or0_out_X , and0_out, B1 );
+ sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 (pwrgood_pp0_out_X, or0_out_X, VPWR, VGND);
+ buf buf0 (X , pwrgood_pp0_out_X );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_BEHAVIORAL_PP_V
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.behavioral.v b/cells/a21o/sky130_fd_sc_hvl__a21o.behavioral.v
new file mode 100644
index 0000000..cf6db96
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.behavioral.v
@@ -0,0 +1,67 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HVL__A21O_BEHAVIORAL_V
+`define SKY130_FD_SC_HVL__A21O_BEHAVIORAL_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`celldefine
+module sky130_fd_sc_hvl__a21o (
+ X ,
+ A1,
+ A2,
+ B1
+);
+
+ // Module ports
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+
+ // Module supplies
+ supply1 VPWR;
+ supply0 VGND;
+ supply1 VPB ;
+ supply0 VNB ;
+
+ // Local signals
+ wire and0_out ;
+ wire or0_out_X;
+
+ // Name Output Other arguments
+ and and0 (and0_out , A1, A2 );
+ or or0 (or0_out_X, and0_out, B1 );
+ buf buf0 (X , or0_out_X );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_BEHAVIORAL_V
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.blackbox.v b/cells/a21o/sky130_fd_sc_hvl__a21o.blackbox.v
new file mode 100644
index 0000000..b926c2c
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.blackbox.v
@@ -0,0 +1,57 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HVL__A21O_BLACKBOX_V
+`define SKY130_FD_SC_HVL__A21O_BLACKBOX_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog stub definition (black box without power pins).
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hvl__a21o (
+ X ,
+ A1,
+ A2,
+ B1
+);
+
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+
+ // Voltage supply signals
+ supply1 VPWR;
+ supply0 VGND;
+ supply1 VPB ;
+ supply0 VNB ;
+
+endmodule
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_BLACKBOX_V
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.functional.pp.v b/cells/a21o/sky130_fd_sc_hvl__a21o.functional.pp.v
new file mode 100644
index 0000000..4f8536d
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.functional.pp.v
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HVL__A21O_FUNCTIONAL_PP_V
+`define SKY130_FD_SC_HVL__A21O_FUNCTIONAL_PP_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+// Import user defined primitives.
+`include "../../models/udp_pwrgood_pp_pg/sky130_fd_sc_hvl__udp_pwrgood_pp_pg.v"
+
+`celldefine
+module sky130_fd_sc_hvl__a21o (
+ X ,
+ A1 ,
+ A2 ,
+ B1 ,
+ VPWR,
+ VGND,
+ VPB ,
+ VNB
+);
+
+ // Module ports
+ output X ;
+ input A1 ;
+ input A2 ;
+ input B1 ;
+ input VPWR;
+ input VGND;
+ input VPB ;
+ input VNB ;
+
+ // Local signals
+ wire and0_out ;
+ wire or0_out_X ;
+ wire pwrgood_pp0_out_X;
+
+ // Name Output Other arguments
+ and and0 (and0_out , A1, A2 );
+ or or0 (or0_out_X , and0_out, B1 );
+ sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 (pwrgood_pp0_out_X, or0_out_X, VPWR, VGND);
+ buf buf0 (X , pwrgood_pp0_out_X );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_FUNCTIONAL_PP_V
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.functional.v b/cells/a21o/sky130_fd_sc_hvl__a21o.functional.v
new file mode 100644
index 0000000..1e26cc9
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.functional.v
@@ -0,0 +1,61 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HVL__A21O_FUNCTIONAL_V
+`define SKY130_FD_SC_HVL__A21O_FUNCTIONAL_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`celldefine
+module sky130_fd_sc_hvl__a21o (
+ X ,
+ A1,
+ A2,
+ B1
+);
+
+ // Module ports
+ output X ;
+ input A1;
+ input A2;
+ input B1;
+
+ // Local signals
+ wire and0_out ;
+ wire or0_out_X;
+
+ // Name Output Other arguments
+ and and0 (and0_out , A1, A2 );
+ or or0 (or0_out_X, and0_out, B1 );
+ buf buf0 (X , or0_out_X );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_FUNCTIONAL_V
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.json b/cells/a21o/sky130_fd_sc_hvl__a21o.json
new file mode 100644
index 0000000..5651186
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.json
@@ -0,0 +1,123 @@
+{
+ "creator": "Yosys 0.9+2406 (git sha1 46ed0db2, clang 7.0.1-8 -fPIC -Os)",
+ "modules": {
+ "sky130_fd_sc_hvl__a21o": {
+ "attributes": {
+ "top": 1,
+ "src": "./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:35.1-57.10"
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+ "X": {
+ "direction": "output",
+ "bits": [ 2 ]
+ },
+ "A1": {
+ "direction": "input",
+ "bits": [ 3 ]
+ },
+ "A2": {
+ "direction": "input",
+ "bits": [ 4 ]
+ },
+ "B1": {
+ "direction": "input",
+ "bits": [ 5 ]
+ }
+ },
+ "cells": {
+ "$and$./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:53$1": {
+ "hide_name": 1,
+ "type": "$and",
+ "parameters": {
+ "A_SIGNED": 0,
+ "A_WIDTH": 1,
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+ "Y_WIDTH": 1
+ },
+ "attributes": {
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+ },
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+ "B": "input",
+ "Y": "output"
+ },
+ "connections": {
+ "A": [ 3 ],
+ "B": [ 4 ],
+ "Y": [ 6 ]
+ }
+ },
+ "$or$./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:54$2": {
+ "hide_name": 1,
+ "type": "$or",
+ "parameters": {
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+ },
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+ },
+ "port_directions": {
+ "A": "input",
+ "B": "input",
+ "Y": "output"
+ },
+ "connections": {
+ "A": [ 6 ],
+ "B": [ 5 ],
+ "Y": [ 2 ]
+ }
+ }
+ },
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+ "bits": [ 5 ],
+ "attributes": {
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+ "bits": [ 2 ],
+ "attributes": {
+ "src": "./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:43.12-43.13"
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+ "hide_name": 0,
+ "bits": [ 6 ],
+ "attributes": {
+ "src": "./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:49.10-49.18"
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+ "hide_name": 0,
+ "bits": [ 2 ],
+ "attributes": {
+ "src": "./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:50.10-50.19"
+ }
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+ }
+ }
+ }
+}
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.pp.blackbox.v b/cells/a21o/sky130_fd_sc_hvl__a21o.pp.blackbox.v
new file mode 100644
index 0000000..5662976
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.pp.blackbox.v
@@ -0,0 +1,58 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HVL__A21O_PP_BLACKBOX_V
+`define SKY130_FD_SC_HVL__A21O_PP_BLACKBOX_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog stub definition (black box with power pins).
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hvl__a21o (
+ X ,
+ A1 ,
+ A2 ,
+ B1 ,
+ VPWR,
+ VGND,
+ VPB ,
+ VNB
+);
+
+ output X ;
+ input A1 ;
+ input A2 ;
+ input B1 ;
+ input VPWR;
+ input VGND;
+ input VPB ;
+ input VNB ;
+endmodule
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_PP_BLACKBOX_V
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.pp.symbol.svg b/cells/a21o/sky130_fd_sc_hvl__a21o.pp.symbol.svg
new file mode 100644
index 0000000..992ae0e
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.pp.symbol.svg
@@ -0,0 +1,67 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created by Symbolator http://kevinpt.github.io/symbolator -->
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+xmlns:xlink="http://www.w3.org/1999/xlink"
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+<text class="fnt1" x="70.0" y="-5.0" text-anchor="middle" dy="5.5">Power</text>
+<g transform="translate(0,19)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">VPB</text>
+</g>
+<g transform="translate(0,41)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">VPWR</text>
+</g>
+<g transform="translate(0,63)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">VGND</text>
+</g>
+<g transform="translate(0,85)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">VNB</text>
+</g>
+</g>
+<rect x="1.0" y="-20.0" width="138.0" height="230.0" stroke="#000000" fill="none" stroke-width="3"/>
+<text class="fnt3" x="70.0" y="-30.0" text-anchor="middle" dy="-1.0">a21o</text>
+<text class="fnt4" x="70.0" y="230.0" text-anchor="middle" dy="1.0">sky130_fd_sc_hvl</text>
+</svg>
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.pp.symbol.v b/cells/a21o/sky130_fd_sc_hvl__a21o.pp.symbol.v
new file mode 100644
index 0000000..ce45293
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.pp.symbol.v
@@ -0,0 +1,53 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HVL__A21O_PP_SYMBOL_V
+`define SKY130_FD_SC_HVL__A21O_PP_SYMBOL_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog stub (with power pins) for graphical symbol definition
+ * generation.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hvl__a21o (
+ //# {{data|Data Signals}}
+ input A1 ,
+ input A2 ,
+ input B1 ,
+ output X ,
+
+ //# {{power|Power}}
+ input VPB ,
+ input VPWR,
+ input VGND,
+ input VNB
+);
+endmodule
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_PP_SYMBOL_V
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.schematic.svg b/cells/a21o/sky130_fd_sc_hvl__a21o.schematic.svg
new file mode 100644
index 0000000..bb72754
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.schematic.svg
@@ -0,0 +1,74 @@
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:s="https://github.com/nturley/netlistsvg" width="249" height="129">
+ <style>svg {
+ stroke:#000;
+ fill:none;
+ }
+ text {
+ fill:#000;
+ stroke:none;
+ font-size:10px;
+ font-weight: bold;
+ font-family: "Courier New", monospace;
+ }
+ .nodelabel {
+ text-anchor: middle;
+ }
+ .inputPortLabel {
+ text-anchor: end;
+ }
+ .splitjoinBody {
+ fill:#000;
+ }</style>
+ <g s:type="and" transform="translate(77,27)" s:width="30" s:height="25" id="cell_$and$./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:53$1">
+ <s:alias val="$and"/>
+ <s:alias val="$logic_and"/>
+ <s:alias val="$_AND_"/>
+ <path d="M0,0 L0,25 L15,25 A15 12.5 0 0 0 15,0 Z" class="cell_$and$./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:53$1"/>
+ <g s:x="0" s:y="5" s:pid="A"/>
+ <g s:x="0" s:y="20" s:pid="B"/>
+ <g s:x="30" s:y="12.5" s:pid="Y"/>
+ </g>
+ <g s:type="or" transform="translate(142,34.5)" s:width="30" s:height="25" id="cell_$or$./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:54$2">
+ <s:alias val="$or"/>
+ <s:alias val="$logic_or"/>
+ <s:alias val="$_OR_"/>
+ <path d="M0,25 L0,25 L15,25 A15 12.5 0 0 0 15,0 L0,0" class="cell_$or$./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:54$2"/>
+ <path d="M0,0 A30 25 0 0 1 0,25" class="cell_$or$./cells/a21o/sky130_fd_sc_hvl__a21o.functional.v:54$2"/>
+ <g s:x="3" s:y="5" s:pid="A"/>
+ <g s:x="3" s:y="20" s:pid="B"/>
+ <g s:x="30" s:y="12.5" s:pid="Y"/>
+ </g>
+ <g s:type="outputExt" transform="translate(207,37)" s:width="30" s:height="20" id="cell_X">
+ <text x="15" y="-4" class="nodelabel cell_X" s:attribute="ref">X</text>
+ <s:alias val="$_outputExt_"/>
+ <path d="M30,0 L30,20 L15,20 L0,10 L15,0 Z" class="cell_X"/>
+ <g s:x="0" s:y="10" s:pid="A"/>
+ </g>
+ <g s:type="inputExt" transform="translate(12,22)" s:width="30" s:height="20" id="cell_A1">
+ <text x="15" y="-4" class="nodelabel cell_A1" s:attribute="ref">A1</text>
+ <s:alias val="$_inputExt_"/>
+ <path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A1"/>
+ <g s:x="28" s:y="10" s:pid="Y"/>
+ </g>
+ <g s:type="inputExt" transform="translate(12,87)" s:width="30" s:height="20" id="cell_A2">
+ <text x="15" y="-4" class="nodelabel cell_A2" s:attribute="ref">A2</text>
+ <s:alias val="$_inputExt_"/>
+ <path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_A2"/>
+ <g s:x="28" s:y="10" s:pid="Y"/>
+ </g>
+ <g s:type="inputExt" transform="translate(77,97)" s:width="30" s:height="20" id="cell_B1">
+ <text x="15" y="-4" class="nodelabel cell_B1" s:attribute="ref">B1</text>
+ <s:alias val="$_inputExt_"/>
+ <path d="M0,0 L0,20 L15,20 L30,10 L15,0 Z" class="cell_B1"/>
+ <g s:x="28" s:y="10" s:pid="Y"/>
+ </g>
+ <line x1="40" x2="77" y1="32" y2="32" class="net_3"/>
+ <line x1="40" x2="52" y1="97" y2="97" class="net_4"/>
+ <line x1="52" x2="52" y1="97" y2="47" class="net_4"/>
+ <line x1="52" x2="77" y1="47" y2="47" class="net_4"/>
+ <line x1="107" x2="145" y1="39.5" y2="39.5" class="net_6"/>
+ <line x1="105" x2="117" y1="107" y2="107" class="net_5"/>
+ <line x1="117" x2="117" y1="107" y2="54.5" class="net_5"/>
+ <line x1="117" x2="145" y1="54.5" y2="54.5" class="net_5"/>
+ <line x1="172" x2="207" y1="47" y2="47" class="net_2"/>
+</svg>
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.specify.v b/cells/a21o/sky130_fd_sc_hvl__a21o.specify.v
new file mode 100644
index 0000000..b2120f2
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.specify.v
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+specify
+(A1 +=> X) = (0:0:0,0:0:0);
+(A2 +=> X) = (0:0:0,0:0:0);
+if ((!A1&!A2)) (B1 +=> X) = (0:0:0,0:0:0);
+if ((!A1&A2)) (B1 +=> X) = (0:0:0,0:0:0);
+if ((A1&!A2)) (B1 +=> X) = (0:0:0,0:0:0);
+endspecify
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.symbol.svg b/cells/a21o/sky130_fd_sc_hvl__a21o.symbol.svg
new file mode 100644
index 0000000..b5227c7
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.symbol.svg
@@ -0,0 +1,47 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created by Symbolator http://kevinpt.github.io/symbolator -->
+<svg xmlns="http://www.w3.org/2000/svg"
+xmlns:xlink="http://www.w3.org/1999/xlink"
+xml:space="preserve"
+width="191" height="168" viewBox="-25 -56 191.0 168.0" version="1.1">
+<style type="text/css">
+<![CDATA[
+.fnt1 { fill:#000000; font-family:Times; font-size:12pt; font-weight:normal; font-style:italic; }
+.fnt2 { fill:#000000; font-family:Helvetica; font-size:12pt; font-weight:normal; font-style:normal; }
+.fnt3 { fill:#000000; font-family:Helvetica; font-size:16pt; font-weight:bold; font-style:normal; }
+.fnt4 { fill:#000000; font-family:Helvetica; font-size:10pt; font-style:normal; }
+.label {fill:#000;
+ text-anchor:middle;
+ font-size:16pt; font-weight:bold; font-family:Sans;}
+.link {fill: #0D47A1;}
+.link:hover {fill: #0D47A1; text-decoration:underline;}
+.link:visited {fill: #4A148C;}
+]]>
+</style>
+<defs>
+
+</defs>
+<rect x="-25" y="-56" width="100%" height="100%" fill="white"/><g transform="translate(0,0)">
+<rect x="0" y="-21.0" width="140" height="105.0" stroke="#000000" fill="#CCFED2" stroke-width="1"/>
+<text class="fnt1" x="70.0" y="-5.0" text-anchor="middle" dy="5.5">Data Signals</text>
+<g transform="translate(0,19)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">A1</text>
+</g>
+<g transform="translate(0,41)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">A2</text>
+</g>
+<g transform="translate(0,63)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">B1</text>
+</g>
+<g transform="translate(140,19)">
+<line x1="20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="-10" y="0" text-anchor="end" dy="5.5">X</text>
+</g>
+</g>
+<rect x="1.0" y="-20.0" width="138.0" height="103.0" stroke="#000000" fill="none" stroke-width="3"/>
+<text class="fnt3" x="70.0" y="-30.0" text-anchor="middle" dy="-1.0">a21o</text>
+<text class="fnt4" x="70.0" y="103.0" text-anchor="middle" dy="1.0">sky130_fd_sc_hvl</text>
+</svg>
\ No newline at end of file
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.symbol.v b/cells/a21o/sky130_fd_sc_hvl__a21o.symbol.v
new file mode 100644
index 0000000..60dd83b
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.symbol.v
@@ -0,0 +1,54 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HVL__A21O_SYMBOL_V
+`define SKY130_FD_SC_HVL__A21O_SYMBOL_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog stub (without power pins) for graphical symbol definition
+ * generation.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hvl__a21o (
+ //# {{data|Data Signals}}
+ input A1,
+ input A2,
+ input B1,
+ output X
+);
+
+ // Voltage supply signals
+ supply1 VPWR;
+ supply0 VGND;
+ supply1 VPB ;
+ supply0 VNB ;
+
+endmodule
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_SYMBOL_V
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.tb.v b/cells/a21o/sky130_fd_sc_hvl__a21o.tb.v
new file mode 100644
index 0000000..0895931
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.tb.v
@@ -0,0 +1,104 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HVL__A21O_TB_V
+`define SKY130_FD_SC_HVL__A21O_TB_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Autogenerated test bench.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`include "sky130_fd_sc_hvl__a21o.v"
+
+module top();
+
+ // Inputs are registered
+ reg A1;
+ reg A2;
+ reg B1;
+ reg VPWR;
+ reg VGND;
+ reg VPB;
+ reg VNB;
+
+ // Outputs are wires
+ wire X;
+
+ initial
+ begin
+ // Initial state is x for all inputs.
+ A1 = 1'bX;
+ A2 = 1'bX;
+ B1 = 1'bX;
+ VGND = 1'bX;
+ VNB = 1'bX;
+ VPB = 1'bX;
+ VPWR = 1'bX;
+
+ #20 A1 = 1'b0;
+ #40 A2 = 1'b0;
+ #60 B1 = 1'b0;
+ #80 VGND = 1'b0;
+ #100 VNB = 1'b0;
+ #120 VPB = 1'b0;
+ #140 VPWR = 1'b0;
+ #160 A1 = 1'b1;
+ #180 A2 = 1'b1;
+ #200 B1 = 1'b1;
+ #220 VGND = 1'b1;
+ #240 VNB = 1'b1;
+ #260 VPB = 1'b1;
+ #280 VPWR = 1'b1;
+ #300 A1 = 1'b0;
+ #320 A2 = 1'b0;
+ #340 B1 = 1'b0;
+ #360 VGND = 1'b0;
+ #380 VNB = 1'b0;
+ #400 VPB = 1'b0;
+ #420 VPWR = 1'b0;
+ #440 VPWR = 1'b1;
+ #460 VPB = 1'b1;
+ #480 VNB = 1'b1;
+ #500 VGND = 1'b1;
+ #520 B1 = 1'b1;
+ #540 A2 = 1'b1;
+ #560 A1 = 1'b1;
+ #580 VPWR = 1'bx;
+ #600 VPB = 1'bx;
+ #620 VNB = 1'bx;
+ #640 VGND = 1'bx;
+ #660 B1 = 1'bx;
+ #680 A2 = 1'bx;
+ #700 A1 = 1'bx;
+ end
+
+ sky130_fd_sc_hvl__a21o dut (.A1(A1), .A2(A2), .B1(B1), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB), .X(X));
+
+endmodule
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_TB_V
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o.v b/cells/a21o/sky130_fd_sc_hvl__a21o.v
new file mode 100644
index 0000000..77ce603
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o.v
@@ -0,0 +1,54 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HVL__A21O_V
+`define SKY130_FD_SC_HVL__A21O_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog top module.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`ifdef USE_POWER_PINS
+
+`ifdef FUNCTIONAL
+`include "sky130_fd_sc_hvl__a21o.pp.functional.v"
+`else // FUNCTIONAL
+`include "sky130_fd_sc_hvl__a21o.pp.behavioral.v"
+`endif // FUNCTIONAL
+
+`else // USE_POWER_PINS
+
+`ifdef FUNCTIONAL
+`include "sky130_fd_sc_hvl__a21o.functional.v"
+`else // FUNCTIONAL
+`include "sky130_fd_sc_hvl__a21o.behavioral.v"
+`endif // FUNCTIONAL
+
+`endif // USE_POWER_PINS
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_V
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.cdl b/cells/a21o/sky130_fd_sc_hvl__a21o_1.cdl
new file mode 100644
index 0000000..4859dba
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.cdl
@@ -0,0 +1,35 @@
+* Copyright 2020 The SkyWater PDK Authors
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* https://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+* SPDX-License-Identifier: Apache-2.0
+
+.SUBCKT sky130_fd_sc_hvl__a21o_1 A1 A2 B1 VGND VNB VPB VPWR X
+*.PININFO A1:I A2:I B1:I VGND:I VNB:I VPB:I VPWR:I X:O
+MMPA0 pndA A1 VPB phv m=1 w=1.5 l=0.5 mult=1 sa=0.265 sb=0.265 sd=0.28
++ topography=normal area=0.063 perim=1.14
+MMPA1 pndA A2 VPB phv m=1 w=1.5 l=0.5 mult=1 sa=0.265 sb=0.265 sd=0.28
++ topography=normal area=0.063 perim=1.14
+MMPB0 y B1 VPB phv m=1 w=1.5 l=0.5 mult=1 sa=0.265 sb=0.265 sd=0.28
++ topography=normal area=0.063 perim=1.14
+MMIPX X y VPB phv m=1 w=1.5 l=0.5 mult=1 sa=0.265 sb=0.265 sd=0.28
++ topography=normal area=0.063 perim=1.14
+MMNA0 y A1 VNB nhv m=1 w=0.75 l=0.5 mult=1 sa=0.265 sb=0.265 sd=0.28
++ topography=normal area=0.063 perim=1.14
+MMNA1 sndA1 A2 VNB nhv m=1 w=0.75 l=0.5 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMNB0 y B1 VNB nhv m=1 w=0.75 l=0.5 mult=1 sa=0.265 sb=0.265 sd=0.28
++ topography=normal area=0.063 perim=1.14
+MMINX X y VNB nhv m=1 w=0.75 l=0.5 mult=1 sa=0.265 sb=0.265 sd=0.28
++ topography=normal area=0.063 perim=1.14
+.ENDS sky130_fd_sc_hvl__a21o_1
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.gds b/cells/a21o/sky130_fd_sc_hvl__a21o_1.gds
new file mode 100644
index 0000000..decc409
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.gds
Binary files differ
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.lef b/cells/a21o/sky130_fd_sc_hvl__a21o_1.lef
new file mode 100644
index 0000000..a0c6422
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.lef
@@ -0,0 +1,167 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.5 ;
+NAMESCASESENSITIVE ON ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+MACRO sky130_fd_sc_hvl__a21o_1
+ CLASS CORE ;
+ SOURCE USER ;
+ ORIGIN 0.000000 0.000000 ;
+ SIZE 4.320000 BY 4.070000 ;
+ SYMMETRY X Y ;
+ SITE unithv ;
+ PIN A1
+ ANTENNAGATEAREA 1.125000 ;
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 2.805000 1.505000 3.715000 1.835000 ;
+ END
+ END A1
+ PIN A2
+ ANTENNAGATEAREA 1.125000 ;
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 3.895000 1.505000 4.195000 1.835000 ;
+ END
+ END A2
+ PIN B1
+ ANTENNAGATEAREA 1.125000 ;
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 1.085000 1.505000 2.275000 1.750000 ;
+ END
+ END B1
+ PIN X
+ ANTENNADIFFAREA 0.611250 ;
+ DIRECTION OUTPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 0.110000 0.495000 0.460000 1.325000 ;
+ RECT 0.110000 1.325000 0.360000 3.735000 ;
+ END
+ END X
+ PIN VGND
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 0.255000 4.320000 0.625000 ;
+ END
+ END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 -0.115000 4.320000 0.115000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 3.955000 4.320000 4.185000 ;
+ END
+ END VPB
+ PIN VPWR
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 3.445000 4.320000 3.815000 ;
+ END
+ END VPWR
+ OBS
+ LAYER li1 ;
+ RECT 0.000000 -0.085000 4.320000 0.085000 ;
+ RECT 0.000000 3.985000 4.320000 4.155000 ;
+ RECT 0.540000 2.280000 1.440000 3.755000 ;
+ RECT 0.565000 1.725000 0.895000 1.930000 ;
+ RECT 0.565000 1.930000 2.625000 2.100000 ;
+ RECT 0.640000 0.365000 2.250000 1.325000 ;
+ RECT 1.620000 2.100000 1.870000 3.755000 ;
+ RECT 2.320000 2.280000 4.210000 2.450000 ;
+ RECT 2.320000 2.450000 2.650000 3.755000 ;
+ RECT 2.430000 0.495000 2.680000 1.325000 ;
+ RECT 2.455000 1.325000 2.625000 1.930000 ;
+ RECT 2.830000 2.630000 3.780000 3.755000 ;
+ RECT 2.860000 0.365000 4.170000 1.325000 ;
+ RECT 3.960000 2.195000 4.210000 2.280000 ;
+ RECT 3.960000 2.450000 4.210000 3.735000 ;
+ LAYER mcon ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ RECT 0.155000 3.985000 0.325000 4.155000 ;
+ RECT 0.155000 3.985000 0.325000 4.155000 ;
+ RECT 0.545000 3.505000 0.715000 3.675000 ;
+ RECT 0.635000 -0.085000 0.805000 0.085000 ;
+ RECT 0.635000 -0.085000 0.805000 0.085000 ;
+ RECT 0.635000 3.985000 0.805000 4.155000 ;
+ RECT 0.635000 3.985000 0.805000 4.155000 ;
+ RECT 0.640000 0.395000 0.810000 0.565000 ;
+ RECT 0.905000 3.505000 1.075000 3.675000 ;
+ RECT 1.000000 0.395000 1.170000 0.565000 ;
+ RECT 1.115000 -0.085000 1.285000 0.085000 ;
+ RECT 1.115000 -0.085000 1.285000 0.085000 ;
+ RECT 1.115000 3.985000 1.285000 4.155000 ;
+ RECT 1.115000 3.985000 1.285000 4.155000 ;
+ RECT 1.265000 3.505000 1.435000 3.675000 ;
+ RECT 1.360000 0.395000 1.530000 0.565000 ;
+ RECT 1.595000 -0.085000 1.765000 0.085000 ;
+ RECT 1.595000 -0.085000 1.765000 0.085000 ;
+ RECT 1.595000 3.985000 1.765000 4.155000 ;
+ RECT 1.595000 3.985000 1.765000 4.155000 ;
+ RECT 1.720000 0.395000 1.890000 0.565000 ;
+ RECT 2.075000 -0.085000 2.245000 0.085000 ;
+ RECT 2.075000 -0.085000 2.245000 0.085000 ;
+ RECT 2.075000 3.985000 2.245000 4.155000 ;
+ RECT 2.075000 3.985000 2.245000 4.155000 ;
+ RECT 2.080000 0.395000 2.250000 0.565000 ;
+ RECT 2.555000 -0.085000 2.725000 0.085000 ;
+ RECT 2.555000 -0.085000 2.725000 0.085000 ;
+ RECT 2.555000 3.985000 2.725000 4.155000 ;
+ RECT 2.555000 3.985000 2.725000 4.155000 ;
+ RECT 2.860000 3.505000 3.030000 3.675000 ;
+ RECT 2.890000 0.395000 3.060000 0.565000 ;
+ RECT 3.035000 -0.085000 3.205000 0.085000 ;
+ RECT 3.035000 -0.085000 3.205000 0.085000 ;
+ RECT 3.035000 3.985000 3.205000 4.155000 ;
+ RECT 3.035000 3.985000 3.205000 4.155000 ;
+ RECT 3.220000 3.505000 3.390000 3.675000 ;
+ RECT 3.250000 0.395000 3.420000 0.565000 ;
+ RECT 3.515000 -0.085000 3.685000 0.085000 ;
+ RECT 3.515000 -0.085000 3.685000 0.085000 ;
+ RECT 3.515000 3.985000 3.685000 4.155000 ;
+ RECT 3.515000 3.985000 3.685000 4.155000 ;
+ RECT 3.580000 3.505000 3.750000 3.675000 ;
+ RECT 3.610000 0.395000 3.780000 0.565000 ;
+ RECT 3.970000 0.395000 4.140000 0.565000 ;
+ RECT 3.995000 -0.085000 4.165000 0.085000 ;
+ RECT 3.995000 -0.085000 4.165000 0.085000 ;
+ RECT 3.995000 3.985000 4.165000 4.155000 ;
+ RECT 3.995000 3.985000 4.165000 4.155000 ;
+ END
+END sky130_fd_sc_hvl__a21o_1
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.magic.lef b/cells/a21o/sky130_fd_sc_hvl__a21o_1.magic.lef
new file mode 100644
index 0000000..24f8fb5
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.magic.lef
@@ -0,0 +1,161 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.7 ;
+ NAMESCASESENSITIVE ON ;
+ NOWIREEXTENSIONATPIN ON ;
+ DIVIDERCHAR "/" ;
+ BUSBITCHARS "[]" ;
+UNITS
+ DATABASE MICRONS 200 ;
+END UNITS
+MACRO sky130_fd_sc_hvl__a21o_1
+ CLASS CORE ;
+ SOURCE USER ;
+ FOREIGN sky130_fd_sc_hvl__a21o_1 ;
+ ORIGIN 0.000000 0.000000 ;
+ SIZE 4.320000 BY 4.070000 ;
+ SYMMETRY X Y ;
+ SITE unithv ;
+ PIN A1
+ ANTENNAGATEAREA 1.125000 ;
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 2.805000 1.505000 3.715000 1.835000 ;
+ END
+ END A1
+ PIN A2
+ ANTENNAGATEAREA 1.125000 ;
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 3.895000 1.505000 4.195000 1.835000 ;
+ END
+ END A2
+ PIN B1
+ ANTENNAGATEAREA 1.125000 ;
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 1.085000 1.505000 2.275000 1.750000 ;
+ END
+ END B1
+ PIN X
+ ANTENNADIFFAREA 0.611250 ;
+ DIRECTION OUTPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 0.110000 0.495000 0.460000 1.325000 ;
+ RECT 0.110000 1.325000 0.360000 3.735000 ;
+ END
+ END X
+ PIN VGND
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER li1 ;
+ RECT 0.640000 0.365000 2.250000 1.325000 ;
+ RECT 2.860000 0.365000 4.170000 1.325000 ;
+ LAYER mcon ;
+ RECT 0.640000 0.395000 0.810000 0.565000 ;
+ RECT 1.000000 0.395000 1.170000 0.565000 ;
+ RECT 1.360000 0.395000 1.530000 0.565000 ;
+ RECT 1.720000 0.395000 1.890000 0.565000 ;
+ RECT 2.080000 0.395000 2.250000 0.565000 ;
+ RECT 2.890000 0.395000 3.060000 0.565000 ;
+ RECT 3.250000 0.395000 3.420000 0.565000 ;
+ RECT 3.610000 0.395000 3.780000 0.565000 ;
+ RECT 3.970000 0.395000 4.140000 0.565000 ;
+ LAYER met1 ;
+ RECT 0.000000 0.255000 4.320000 0.625000 ;
+ END
+ END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER li1 ;
+ RECT 0.000000 -0.085000 4.320000 0.085000 ;
+ LAYER mcon ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ RECT 0.635000 -0.085000 0.805000 0.085000 ;
+ RECT 1.115000 -0.085000 1.285000 0.085000 ;
+ RECT 1.595000 -0.085000 1.765000 0.085000 ;
+ RECT 2.075000 -0.085000 2.245000 0.085000 ;
+ RECT 2.555000 -0.085000 2.725000 0.085000 ;
+ RECT 3.035000 -0.085000 3.205000 0.085000 ;
+ RECT 3.515000 -0.085000 3.685000 0.085000 ;
+ RECT 3.995000 -0.085000 4.165000 0.085000 ;
+ LAYER met1 ;
+ RECT 0.000000 -0.115000 4.320000 0.115000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER li1 ;
+ RECT 0.000000 3.985000 4.320000 4.155000 ;
+ LAYER mcon ;
+ RECT 0.155000 3.985000 0.325000 4.155000 ;
+ RECT 0.635000 3.985000 0.805000 4.155000 ;
+ RECT 1.115000 3.985000 1.285000 4.155000 ;
+ RECT 1.595000 3.985000 1.765000 4.155000 ;
+ RECT 2.075000 3.985000 2.245000 4.155000 ;
+ RECT 2.555000 3.985000 2.725000 4.155000 ;
+ RECT 3.035000 3.985000 3.205000 4.155000 ;
+ RECT 3.515000 3.985000 3.685000 4.155000 ;
+ RECT 3.995000 3.985000 4.165000 4.155000 ;
+ LAYER met1 ;
+ RECT 0.000000 3.955000 4.320000 4.185000 ;
+ END
+ END VPB
+ PIN VPWR
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER li1 ;
+ RECT 0.540000 2.280000 1.440000 3.755000 ;
+ RECT 2.830000 2.630000 3.780000 3.755000 ;
+ LAYER mcon ;
+ RECT 0.545000 3.505000 0.715000 3.675000 ;
+ RECT 0.905000 3.505000 1.075000 3.675000 ;
+ RECT 1.265000 3.505000 1.435000 3.675000 ;
+ RECT 2.860000 3.505000 3.030000 3.675000 ;
+ RECT 3.220000 3.505000 3.390000 3.675000 ;
+ RECT 3.580000 3.505000 3.750000 3.675000 ;
+ LAYER met1 ;
+ RECT 0.000000 3.445000 4.320000 3.815000 ;
+ END
+ END VPWR
+ OBS
+ LAYER li1 ;
+ RECT 0.565000 1.725000 0.895000 1.930000 ;
+ RECT 0.565000 1.930000 2.625000 2.100000 ;
+ RECT 1.620000 2.100000 1.870000 3.755000 ;
+ RECT 2.320000 2.280000 4.210000 2.450000 ;
+ RECT 2.320000 2.450000 2.650000 3.755000 ;
+ RECT 2.430000 0.495000 2.680000 1.325000 ;
+ RECT 2.455000 1.325000 2.625000 1.930000 ;
+ RECT 3.960000 2.195000 4.210000 2.280000 ;
+ RECT 3.960000 2.450000 4.210000 3.735000 ;
+ END
+END sky130_fd_sc_hvl__a21o_1
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.netlist.tsv b/cells/a21o/sky130_fd_sc_hvl__a21o_1.netlist.tsv
new file mode 100644
index 0000000..f51fb31
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.netlist.tsv
@@ -0,0 +1,10 @@
+sky130_fd_sc_hvl__a21o_1 A1:I A2:I B1:I VGND:I VNB:I VPB:I VPWR:I X:O
+Name Formula nd ng ns nb mname m w l mult sa sb sd topography area perim
+MMPA0 MOSFET pndA A1 VPWR VPB phv 1 1.5 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
+MMPA1 MOSFET pndA A2 VPWR VPB phv 1 1.5 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
+MMPB0 MOSFET y B1 pndA VPB phv 1 1.5 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
+MMIPX MOSFET X y VPWR VPB phv 1 1.5 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
+MMNA0 MOSFET y A1 sndA1 VNB nhv 1 0.75 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
+MMNA1 MOSFET sndA1 A2 VGND VNB nhv 1 0.75 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
+MMNB0 MOSFET y B1 VGND VNB nhv 1 0.75 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
+MMINX MOSFET X y VGND VNB nhv 1 0.75 0.5 1 0.265 0.265 0.28 normal 0.063 1.14
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.spice b/cells/a21o/sky130_fd_sc_hvl__a21o_1.spice
new file mode 100644
index 0000000..5fcc716
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.spice
@@ -0,0 +1,21 @@
+* NGSPICE file created from sky130_fd_sc_hvl__a21o_1.ext - technology: sky130A
+
+.subckt sky130_fd_sc_hvl__a21o_1 A1 A2 B1 VGND VNB VPB VPWR X
+M1000 a_83_283# B1 VGND VNB nhv w=750000u l=500000u
++ ad=2.1e+11p pd=2.06e+06u as=8.5875e+11p ps=5.29e+06u
+M1001 VGND a_83_283# X VNB nhv w=750000u l=500000u
++ ad=0p pd=0u as=2.1375e+11p ps=2.07e+06u
+M1002 VPWR a_83_283# X VPB phv w=1.5e+06u l=500000u
++ ad=8.475e+11p pd=7.13e+06u as=3.975e+11p ps=3.53e+06u
+M1003 VPWR A1 a_469_443# VPB phv w=1.5e+06u l=500000u
++ ad=0p pd=0u as=8.175e+11p ps=7.09e+06u
+M1004 a_469_443# B1 a_83_283# VPB phv w=1.5e+06u l=500000u
++ ad=0p pd=0u as=4.275e+11p ps=3.57e+06u
+M1005 a_469_443# A2 VPWR VPB phv w=1.5e+06u l=500000u
++ ad=0p pd=0u as=0p ps=0u
+M1006 a_631_107# A1 a_83_283# VNB nhv w=750000u l=500000u
++ ad=1.575e+11p pd=1.92e+06u as=0p ps=0u
+M1007 VGND A2 a_631_107# VNB nhv w=750000u l=500000u
++ ad=0p pd=0u as=0p ps=0u
+.ends
+
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.svg b/cells/a21o/sky130_fd_sc_hvl__a21o_1.svg
new file mode 100644
index 0000000..6ff7aeb
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.svg
@@ -0,0 +1,221 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" width="1898pt" height="1059pt" viewBox="0 0 1898 1059" version="1.2">
+<defs>
+<clipPath id="clip1">
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+</clipPath>
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diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1.v b/cells/a21o/sky130_fd_sc_hvl__a21o_1.v
new file mode 100644
index 0000000..c3b1ef4
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1.v
@@ -0,0 +1,119 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HVL__A21O_1_V
+`define SKY130_FD_SC_HVL__A21O_1_V
+
+/**
+ * a21o: 2-input AND into first input of 2-input OR.
+ *
+ * X = ((A1 & A2) | B1)
+ *
+ * Verilog wrapper for a21o with size of 1 units.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`include "sky130_fd_sc_hvl__a21o.v"
+
+`ifdef USE_POWER_PINS
+/*********************************************************/
+
+`celldefine
+module sky130_fd_sc_hvl__a21o_1 (
+ X ,
+ A1 ,
+ A2 ,
+ B1 ,
+ VPWR,
+ VGND,
+ VPB ,
+ VNB
+);
+
+ output X ;
+ input A1 ;
+ input A2 ;
+ input B1 ;
+ input VPWR;
+ input VGND;
+ input VPB ;
+ input VNB ;
+ sky130_fd_sc_hvl__a21o cell (
+ .X(X),
+ .A1(A1),
+ .A2(A2),
+ .B1(B1),
+ .VPWR(VPWR),
+ .VGND(VGND),
+ .VPB(VPB),
+ .VNB(VNB)
+ );
+
+endmodule
+`endcelldefine
+
+/*********************************************************/
+`else // If not USE_POWER_PINS
+/*********************************************************/
+
+`celldefine
+module sky130_fd_sc_hvl__a21o_1 (
+ X ,
+ A1 ,
+ A2 ,
+ B1 ,
+ VPWR,
+ VGND,
+ VPB ,
+ VNB
+);
+
+ output X ;
+ input A1 ;
+ input A2 ;
+ input B1 ;
+ input VPWR;
+ input VGND;
+ input VPB ;
+ input VNB ;
+
+ // Voltage supply signals
+ supply1 VPWR;
+ supply0 VGND;
+ supply1 VPB ;
+ supply0 VNB ;
+
+ sky130_fd_sc_hvl__a21o cell (
+ .X(X),
+ .A1(A1),
+ .A2(A2),
+ .B1(B1)
+ );
+
+endmodule
+`endcelldefine
+
+/*********************************************************/
+`endif // USE_POWER_PINS
+
+`default_nettype wire
+`endif // SKY130_FD_SC_HVL__A21O_1_V
diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_085C_5v50.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_085C_5v50.lib.json
new file mode 100644
index 0000000..f070ee4
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_085C_5v50.lib.json
@@ -0,0 +1,10908 @@
+{
+ "area": 17.5824,
+ "cell_footprint": "a21o",
+ "cell_leakage_power": 1.934745,
+ "driver_waveform_fall": "ramp",
+ "driver_waveform_rise": "ramp",
+ "leakage_power": [
+ {
+ "value": 1.5302898,
+ "when": "!A1&!A2&B1"
+ },
+ {
+ "value": 2.2265123,
+ "when": "!A1&!A2&!B1"
+ },
+ {
+ "value": 1.5302886,
+ "when": "!A1&A2&B1"
+ },
+ {
+ "value": 3.189617,
+ "when": "!A1&A2&!B1"
+ },
+ {
+ "value": 1.5302882,
+ "when": "A1&!A2&B1"
+ },
+ {
+ "value": 2.7922855,
+ "when": "A1&!A2&!B1"
+ },
+ {
+ "value": 1.1704294,
+ "when": "A1&A2&B1"
+ },
+ {
+ "value": 1.5082522,
+ "when": "A1&A2&!B1"
+ }
+ ],
+ "pg_pin VGND": {
+ "pg_type": "primary_ground",
+ "voltage_name": "VGND"
+ },
+ "pg_pin VNB": {
+ "pg_type": "pwell",
+ "voltage_name": "VNB"
+ },
+ "pg_pin VPB": {
+ "pg_type": "nwell",
+ "voltage_name": "VPB"
+ },
+ "pg_pin VPWR": {
+ "pg_type": "primary_power",
+ "voltage_name": "VPWR"
+ },
+ "pin A1": {
+ "capacitance": 0.004233,
+ "clock": "false",
+ "direction": "input",
+ "fall_capacitance": 0.004186,
+ "internal_power": {
+ "fall_power hidden_pwr_template11": {
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+ 3.7499999
+ ],
+ "values": [
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+ 0.0799313,
+ 0.0797796,
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+ 0.0789267
+ ]
+ },
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+ ]
+ }
+ },
+ "max_transition": 3.75,
+ "related_ground_pin": "VGND",
+ "related_power_pin": "VPWR",
+ "rise_capacitance": 0.004281
+ },
+ "pin A2": {
+ "capacitance": 0.004098,
+ "clock": "false",
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+ ]
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+ ]
+ }
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+ "max_transition": 3.75,
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+ "related_power_pin": "VPWR",
+ "rise_capacitance": 0.004205
+ },
+ "pin B1": {
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+ ]
+ }
+ },
+ "max_transition": 3.75,
+ "related_ground_pin": "VGND",
+ "related_power_pin": "VPWR",
+ "rise_capacitance": 0.004512
+ },
+ "pin X": {
+ "direction": "output",
+ "function": "(A1&A2) | (B1)",
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diff --git a/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_100C_5v50.lib.json b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_100C_5v50.lib.json
new file mode 100644
index 0000000..4fc08f1
--- /dev/null
+++ b/cells/a21o/sky130_fd_sc_hvl__a21o_1__ff_100C_5v50.lib.json
@@ -0,0 +1,4421 @@
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