| { |
| "area": 68.376, |
| "cell_footprint": "sky130_fd_sc_hvl__dfrbp", |
| "cell_leakage_power": 1.245061, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "ff,IQ,IQ_N": { |
| "clear": "!RESET_B", |
| "clocked_on": "CLK", |
| "next_state": "D" |
| }, |
| "leakage_power": [ |
| { |
| "value": 1.6444274, |
| "when": "D&RESET_B&CLK" |
| }, |
| { |
| "value": 1.3282732, |
| "when": "!D&RESET_B&!CLK" |
| }, |
| { |
| "value": 0.9504396, |
| "when": "!D&!RESET_B&CLK" |
| }, |
| { |
| "value": 1.5947432, |
| "when": "!D&RESET_B&CLK" |
| }, |
| { |
| "value": 1.3151197, |
| "when": "D&RESET_B&!CLK" |
| }, |
| { |
| "value": 1.0876672, |
| "when": "D&!RESET_B&CLK" |
| }, |
| { |
| "value": 0.9512937, |
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| }, |
| { |
| "value": 1.0885218, |
| "when": "D&!RESET_B&!CLK" |
| } |
| ], |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VNB": { |
| "pg_type": "pwell", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "nwell", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
| "pin,CLK": { |
| "capacitance": 0.001866, |
| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.001825, |
| "internal_power": { |
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| 0.013, |
| 0.026, |
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| }, |
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| "min_pulse_width_low": 2.872422, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
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| }, |
| "pin,D": { |
| "capacitance": 0.001903, |
| "clock": "false", |
| "direction": "input", |
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| "internal_power": { |
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| }, |
| "max_transition": 3.75, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.00195, |
| "timing": [ |
| { |
| "clk_width": 2.6e-08, |
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| "related_pin": "CLK", |
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| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10 |
| }, |
| { |
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| "timing_type": "removal_rising", |
| "violation_delay_degrade_pct": 10 |
| } |
| ] |
| } |
| } |
