Improve diode LEF files.
* Add `USE` and `SHAPE` properties.
* Remove `CORE` class.
* Fix layer for power pins.
Fixes https://github.com/google/skywater-pdk/issues/141.
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
diff --git a/cells/diode/sky130_fd_sc_hs__diode_2.lef b/cells/diode/sky130_fd_sc_hs__diode_2.lef
new file mode 100644
index 0000000..d136835
--- /dev/null
+++ b/cells/diode/sky130_fd_sc_hs__diode_2.lef
@@ -0,0 +1,83 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.7 ;
+ NOWIREEXTENSIONATPIN ON ;
+ DIVIDERCHAR "/" ;
+ BUSBITCHARS "[]" ;
+MACRO sky130_fd_sc_hs__diode_2
+ CLASS CORE ANTENNACELL ;
+ FOREIGN scs8hs_diode_2 ;
+ ORIGIN 0.000000 0.000000 ;
+ SIZE 0.960000 BY 3.330000 ;
+ SYMMETRY X Y ;
+ SITE unit ;
+ PIN DIODE
+ ANTENNADIFFAREA 0.641700 ;
+ ANTENNAGATEAREA 0.641700 ;
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ PORT
+ LAYER li1 ;
+ RECT 0.095000 0.265000 0.865000 3.065000 ;
+ END
+ END DIODE
+ PIN VGND
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 -0.245000 0.960000 0.245000 ;
+ END
+ END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 0.960000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 1.150000 3.520000 ;
+ END
+ END VPB
+ PIN VPWR
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 3.085000 0.960000 3.575000 ;
+ END
+ END VPWR
+ OBS
+ LAYER li1 ;
+ RECT 0.000000 -0.085000 0.960000 0.085000 ;
+ RECT 0.000000 3.245000 0.960000 3.415000 ;
+ LAYER mcon ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ RECT 0.155000 3.245000 0.325000 3.415000 ;
+ RECT 0.635000 -0.085000 0.805000 0.085000 ;
+ RECT 0.635000 3.245000 0.805000 3.415000 ;
+ END
+END sky130_fd_sc_hs__diode_2
+END LIBRARY
diff --git a/cells/diode/sky130_fd_sc_hs__diode_2.magic.lef b/cells/diode/sky130_fd_sc_hs__diode_2.magic.lef
index ab69d5c..84b360f 100644
--- a/cells/diode/sky130_fd_sc_hs__diode_2.magic.lef
+++ b/cells/diode/sky130_fd_sc_hs__diode_2.magic.lef
@@ -19,43 +19,50 @@
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
MACRO sky130_fd_sc_hs__diode_2
- CLASS BLOCK ;
+ CLASS CORE ANTENNACELL ;
FOREIGN sky130_fd_sc_hs__diode_2 ;
ORIGIN 0.000000 0.000000 ;
SIZE 0.960000 BY 3.330000 ;
+ SYMMETRY X Y ;
+ SITE unit ;
PIN DIODE
ANTENNADIFFAREA 0.641700 ;
ANTENNAGATEAREA 0.641700 ;
DIRECTION INPUT ;
+ USE SIGNAL ;
PORT
LAYER li1 ;
RECT 0.095000 0.265000 0.865000 3.065000 ;
END
END DIODE
- PIN VNB
- DIRECTION INPUT ;
- PORT
- LAYER pwell ;
- RECT 0.000000 0.000000 0.960000 0.245000 ;
- END
- END VNB
- PIN VPB
- DIRECTION INPUT ;
- PORT
- LAYER nwell ;
- RECT -0.190000 1.660000 1.150000 3.520000 ;
- END
- END VPB
PIN VGND
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.245000 0.960000 0.245000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 0.960000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 1.150000 3.520000 ;
+ END
+ END VPB
PIN VPWR
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_2.lef b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_2.lef
new file mode 100644
index 0000000..6342a0f
--- /dev/null
+++ b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_2.lef
@@ -0,0 +1,75 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.7 ;
+ NOWIREEXTENSIONATPIN ON ;
+ DIVIDERCHAR "/" ;
+ BUSBITCHARS "[]" ;
+MACRO sky130_fd_sc_hs__fill_diode_2
+ CLASS SPACER ;
+ FOREIGN scs8hs_fill_diode_2 ;
+ ORIGIN 0.000000 0.000000 ;
+ SIZE 0.960000 BY 3.330000 ;
+ SYMMETRY X Y ;
+ SITE unit ;
+ PIN VGND
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 -0.245000 0.960000 0.245000 ;
+ END
+ END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 0.960000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 1.150000 3.520000 ;
+ END
+ END VPB
+ PIN VPWR
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 3.085000 0.960000 3.575000 ;
+ END
+ END VPWR
+ OBS
+ LAYER li1 ;
+ RECT 0.000000 -0.085000 0.960000 0.085000 ;
+ RECT 0.000000 3.245000 0.960000 3.415000 ;
+ RECT 0.135000 0.085000 0.825000 0.580000 ;
+ RECT 0.135000 2.750000 0.825000 3.245000 ;
+ LAYER mcon ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ RECT 0.155000 3.245000 0.325000 3.415000 ;
+ RECT 0.635000 -0.085000 0.805000 0.085000 ;
+ RECT 0.635000 3.245000 0.805000 3.415000 ;
+ END
+END sky130_fd_sc_hs__fill_diode_2
+END LIBRARY
diff --git a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_2.magic.lef b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_2.magic.lef
index 1d78786..e3942da 100644
--- a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_2.magic.lef
+++ b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_2.magic.lef
@@ -19,34 +19,40 @@
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
MACRO sky130_fd_sc_hs__fill_diode_2
- CLASS BLOCK ;
+ CLASS SPACER ;
FOREIGN sky130_fd_sc_hs__fill_diode_2 ;
ORIGIN 0.000000 0.000000 ;
SIZE 0.960000 BY 3.330000 ;
- PIN VNB
- DIRECTION INPUT ;
- PORT
- LAYER pwell ;
- RECT 0.000000 0.000000 0.960000 0.245000 ;
- END
- END VNB
- PIN VPB
- DIRECTION INPUT ;
- PORT
- LAYER nwell ;
- RECT -0.190000 1.660000 1.150000 3.520000 ;
- END
- END VPB
+ SYMMETRY X Y ;
+ SITE unit ;
PIN VGND
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.245000 0.960000 0.245000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 0.960000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 1.150000 3.520000 ;
+ END
+ END VPB
PIN VPWR
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_4.lef b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_4.lef
new file mode 100644
index 0000000..a88155a
--- /dev/null
+++ b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_4.lef
@@ -0,0 +1,79 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.7 ;
+ NOWIREEXTENSIONATPIN ON ;
+ DIVIDERCHAR "/" ;
+ BUSBITCHARS "[]" ;
+MACRO sky130_fd_sc_hs__fill_diode_4
+ CLASS SPACER ;
+ FOREIGN scs8hs_fill_diode_4 ;
+ ORIGIN 0.000000 0.000000 ;
+ SIZE 1.920000 BY 3.330000 ;
+ SYMMETRY X Y ;
+ SITE unit ;
+ PIN VGND
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 -0.245000 1.920000 0.245000 ;
+ END
+ END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 1.920000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 2.110000 3.520000 ;
+ END
+ END VPB
+ PIN VPWR
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 3.085000 1.920000 3.575000 ;
+ END
+ END VPWR
+ OBS
+ LAYER li1 ;
+ RECT 0.000000 -0.085000 1.920000 0.085000 ;
+ RECT 0.000000 3.245000 1.920000 3.415000 ;
+ RECT 0.135000 0.085000 1.785000 0.580000 ;
+ RECT 0.135000 2.750000 1.785000 3.245000 ;
+ LAYER mcon ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ RECT 0.155000 3.245000 0.325000 3.415000 ;
+ RECT 0.635000 -0.085000 0.805000 0.085000 ;
+ RECT 0.635000 3.245000 0.805000 3.415000 ;
+ RECT 1.115000 -0.085000 1.285000 0.085000 ;
+ RECT 1.115000 3.245000 1.285000 3.415000 ;
+ RECT 1.595000 -0.085000 1.765000 0.085000 ;
+ RECT 1.595000 3.245000 1.765000 3.415000 ;
+ END
+END sky130_fd_sc_hs__fill_diode_4
+END LIBRARY
diff --git a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_4.magic.lef b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_4.magic.lef
index 5c79eda..817e8c0 100644
--- a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_4.magic.lef
+++ b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_4.magic.lef
@@ -19,34 +19,40 @@
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
MACRO sky130_fd_sc_hs__fill_diode_4
- CLASS BLOCK ;
+ CLASS SPACER ;
FOREIGN sky130_fd_sc_hs__fill_diode_4 ;
ORIGIN 0.000000 0.000000 ;
SIZE 1.920000 BY 3.330000 ;
- PIN VNB
- DIRECTION INPUT ;
- PORT
- LAYER pwell ;
- RECT 0.000000 0.000000 1.920000 0.245000 ;
- END
- END VNB
- PIN VPB
- DIRECTION INPUT ;
- PORT
- LAYER nwell ;
- RECT -0.190000 1.660000 2.110000 3.520000 ;
- END
- END VPB
+ SYMMETRY X Y ;
+ SITE unit ;
PIN VGND
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.245000 1.920000 0.245000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 1.920000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 2.110000 3.520000 ;
+ END
+ END VPB
PIN VPWR
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE POWER ;
PORT
LAYER met1 ;
diff --git a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_8.lef b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_8.lef
new file mode 100644
index 0000000..3aa025c
--- /dev/null
+++ b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_8.lef
@@ -0,0 +1,87 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.7 ;
+ NOWIREEXTENSIONATPIN ON ;
+ DIVIDERCHAR "/" ;
+ BUSBITCHARS "[]" ;
+MACRO sky130_fd_sc_hs__fill_diode_8
+ CLASS SPACER ;
+ FOREIGN scs8hs_fill_diode_8 ;
+ ORIGIN 0.000000 0.000000 ;
+ SIZE 3.840000 BY 3.330000 ;
+ SYMMETRY X Y ;
+ SITE unit ;
+ PIN VGND
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE GROUND ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 -0.245000 3.840000 0.245000 ;
+ END
+ END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 3.840000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 4.030000 3.520000 ;
+ END
+ END VPB
+ PIN VPWR
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
+ USE POWER ;
+ PORT
+ LAYER met1 ;
+ RECT 0.000000 3.085000 3.840000 3.575000 ;
+ END
+ END VPWR
+ OBS
+ LAYER li1 ;
+ RECT 0.000000 -0.085000 3.840000 0.085000 ;
+ RECT 0.000000 3.245000 3.840000 3.415000 ;
+ RECT 0.135000 0.085000 3.705000 0.580000 ;
+ RECT 0.135000 2.750000 3.705000 3.245000 ;
+ LAYER mcon ;
+ RECT 0.155000 -0.085000 0.325000 0.085000 ;
+ RECT 0.155000 3.245000 0.325000 3.415000 ;
+ RECT 0.635000 -0.085000 0.805000 0.085000 ;
+ RECT 0.635000 3.245000 0.805000 3.415000 ;
+ RECT 1.115000 -0.085000 1.285000 0.085000 ;
+ RECT 1.115000 3.245000 1.285000 3.415000 ;
+ RECT 1.595000 -0.085000 1.765000 0.085000 ;
+ RECT 1.595000 3.245000 1.765000 3.415000 ;
+ RECT 2.075000 -0.085000 2.245000 0.085000 ;
+ RECT 2.075000 3.245000 2.245000 3.415000 ;
+ RECT 2.555000 -0.085000 2.725000 0.085000 ;
+ RECT 2.555000 3.245000 2.725000 3.415000 ;
+ RECT 3.035000 -0.085000 3.205000 0.085000 ;
+ RECT 3.035000 3.245000 3.205000 3.415000 ;
+ RECT 3.515000 -0.085000 3.685000 0.085000 ;
+ RECT 3.515000 3.245000 3.685000 3.415000 ;
+ END
+END sky130_fd_sc_hs__fill_diode_8
+END LIBRARY
diff --git a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_8.magic.lef b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_8.magic.lef
index 53abea5..8069a3a 100644
--- a/cells/fill_diode/sky130_fd_sc_hs__fill_diode_8.magic.lef
+++ b/cells/fill_diode/sky130_fd_sc_hs__fill_diode_8.magic.lef
@@ -19,34 +19,40 @@
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
MACRO sky130_fd_sc_hs__fill_diode_8
- CLASS BLOCK ;
+ CLASS SPACER ;
FOREIGN sky130_fd_sc_hs__fill_diode_8 ;
ORIGIN 0.000000 0.000000 ;
SIZE 3.840000 BY 3.330000 ;
- PIN VNB
- DIRECTION INPUT ;
- PORT
- LAYER pwell ;
- RECT 0.000000 0.000000 3.840000 0.245000 ;
- END
- END VNB
- PIN VPB
- DIRECTION INPUT ;
- PORT
- LAYER nwell ;
- RECT -0.190000 1.660000 4.030000 3.520000 ;
- END
- END VPB
+ SYMMETRY X Y ;
+ SITE unit ;
PIN VGND
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE GROUND ;
PORT
LAYER met1 ;
RECT 0.000000 -0.245000 3.840000 0.245000 ;
END
END VGND
+ PIN VNB
+ DIRECTION INOUT ;
+ USE GROUND ;
+ PORT
+ LAYER pwell ;
+ RECT 0.000000 0.000000 3.840000 0.245000 ;
+ END
+ END VNB
+ PIN VPB
+ DIRECTION INOUT ;
+ USE POWER ;
+ PORT
+ LAYER nwell ;
+ RECT -0.190000 1.660000 4.030000 3.520000 ;
+ END
+ END VPB
PIN VPWR
- DIRECTION INPUT ;
+ DIRECTION INOUT ;
+ SHAPE ABUTMENT ;
USE POWER ;
PORT
LAYER met1 ;
