| { |
| "area": 14.3856, |
| "cell_footprint": "mux2", |
| "cell_leakage_power": 9.93211, |
| "leakage_power": [ |
| { |
| "value": 8.81504, |
| "when": "!A0&!A1&!S" |
| }, |
| { |
| "value": 16.57303, |
| "when": "!A0&!A1&S" |
| }, |
| { |
| "value": 8.8811, |
| "when": "!A0&A1&!S" |
| }, |
| { |
| "value": 11.74052, |
| "when": "!A0&A1&S" |
| }, |
| { |
| "value": 3.72424, |
| "when": "A0&!A1&!S" |
| }, |
| { |
| "value": 16.64485, |
| "when": "A0&!A1&S" |
| }, |
| { |
| "value": 2.63599, |
| "when": "A0&A1&!S" |
| }, |
| { |
| "value": 10.44214, |
| "when": "A0&A1&S" |
| } |
| ], |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
| "pin A0": { |
| "capacitance": 0.00281, |
| "clock": "false", |
| "direction": "input", |
| "internal_power": { |
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| 0.01735, |
| 0.02602, |
| 0.03903, |
| 0.05855, |
| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
| "values": [ |
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| 0.00877, |
| 0.00852, |
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| 0.00858, |
| 0.00868, |
| 0.00906, |
| 0.00968, |
| 0.0109, |
| 0.01438, |
| 0.01798, |
| 0.02638, |
| 0.03668 |
| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| 0.01735, |
| 0.02602, |
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| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
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| 0.01107, |
| 0.01086, |
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| 0.01081, |
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| 0.01243, |
| 0.01409, |
| 0.0187, |
| 0.02281, |
| 0.03258, |
| 0.04364 |
| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin A1": { |
| "capacitance": 0.00334, |
| "clock": "false", |
| "direction": "input", |
| "internal_power": { |
| "fall_power hidden_pwr_template13": { |
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| 0.01, |
| 0.01735, |
| 0.02602, |
| 0.03903, |
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| 0.08782, |
| 0.13172, |
| 0.19757, |
| 0.29634, |
| 0.44449, |
| 0.6667, |
| 1.0, |
| 1.5 |
| ], |
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| 0.01183, |
| 0.01136, |
| 0.0112, |
| 0.01146, |
| 0.01159, |
| 0.01209, |
| 0.01317, |
| 0.01499, |
| 0.0198, |
| 0.02411, |
| 0.03423, |
| 0.04555 |
| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| 0.29634, |
| 0.44449, |
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| 1.0, |
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| 0.00835, |
| 0.00958, |
| 0.01315, |
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| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin S": { |
| "capacitance": 0.00482, |
| "clock": "false", |
| "direction": "input", |
| "internal_power": { |
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| 0.29634, |
| 0.44449, |
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| 0.01882, |
| 0.02058, |
| 0.02634, |
| 0.03149, |
| 0.044, |
| 0.05817 |
| ] |
| }, |
| "rise_power hidden_pwr_template13": { |
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| 0.02602, |
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| 0.44449, |
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| 1.0, |
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| 0.00587, |
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| 0.0054, |
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| 0.00604, |
| 0.00705, |
| 0.00895, |
| 0.01342, |
| 0.01856, |
| 0.02973, |
| 0.04383 |
| ] |
| } |
| }, |
| "max_transition": 1.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR" |
| }, |
| "pin X": { |
| "direction": "output", |
| "function": "(A0&!S) | (A1&S)", |
| "internal_power": [ |
| { |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| -0.33167 |
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| ] |
| }, |
| "related_pin": "A0", |
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| [ |
| 0.00982, |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| 0.1026, |
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| 0.38183 |
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| [ |
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| 0.02276, |
| 0.03416, |
| 0.05716, |
| 0.1033, |
| 0.19603, |
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| [ |
| 0.0136, |
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| 0.05876, |
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| 0.19709, |
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| [ |
| 0.01684, |
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| 0.03873, |
| 0.06158, |
| 0.10757, |
| 0.19981, |
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| [ |
| 0.02211, |
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| 0.20403, |
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| [ |
| 0.03035, |
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| 0.05106, |
| 0.07357, |
| 0.11947, |
| 0.2115, |
| 0.39644 |
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| ] |
| }, |
| "when": "(!S)" |
| }, |
| { |
| "fall_power pwr_template13x7": { |
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| 0.01735, |
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| 0.01625, |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| 0.00406, |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "A1", |
| "rise_power pwr_template13x7": { |
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| 0.01735, |
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| 0.39553 |
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| ] |
| }, |
| "when": "(S)" |
| }, |
| { |
| "fall_power pwr_template13x7": { |
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| 0.065, |
| 0.1084, |
| 0.199, |
| 0.3833, |
| 0.7538, |
| 1.496 |
| ] |
| ] |
| }, |
| "sdf_cond": "(A0&!A1)", |
| "timing_sense": "negative_unate", |
| "when": "(A0&!A1)" |
| } |
| ] |
| } |
| } |
