blob: 4b11f99c46b012bdbc43a25b76970915591dcd68 [file] [log] [blame]
{
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"clock_gating_integrated_cell": "latch_posedge_precontrol",
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"voltage_name": "VGND"
},
"pg_pin VNB": {
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"voltage_name": "VNB"
},
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},
"pg_pin VPWR": {
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},
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"related_ground_pin": "VGND",
"related_power_pin": "VPWR",
"state_function": "(CLK*M0)",
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-0.34703
],
[
-1.12046,
-1.09703,
-1.09703,
-1.05015,
-0.97984,
-0.86265,
-0.75718,
-0.66343,
-0.56968,
-0.48765
],
[
-1.26109,
-1.26109,
-1.23765,
-1.21422,
-1.1439,
-1.00328,
-0.90953,
-0.80406,
-0.72203,
-0.64
],
[
-1.40172,
-1.40172,
-1.37828,
-1.35484,
-1.28453,
-1.16734,
-1.05015,
-0.9564,
-0.86265,
-0.78062
]
]
},
"related_pin": "CLK",
"rise_constraint sethold_template_rise10x10": {
"index_1": [
0.01,
0.03125,
0.0625,
0.125,
0.25,
0.5,
0.75,
1.0,
1.25,
1.5
],
"index_2": [
0.01,
0.03125,
0.0625,
0.125,
0.25,
0.5,
0.75,
1.0,
1.25,
1.5
],
"values": [
[
0.18911,
0.20082,
0.21547,
0.23598,
0.277,
0.34731,
0.40883,
0.46743,
0.52016,
0.57289
],
[
0.17739,
0.18911,
0.20375,
0.22426,
0.26528,
0.33559,
0.39711,
0.45571,
0.50844,
0.56118
],
[
0.15981,
0.17446,
0.18618,
0.20668,
0.2477,
0.31801,
0.37954,
0.43813,
0.49379,
0.54653
],
[
0.12758,
0.1393,
0.15395,
0.17446,
0.21254,
0.28286,
0.34438,
0.40297,
0.45864,
0.51137
],
[
0.0602,
0.07192,
0.08657,
0.10707,
0.14516,
0.21547,
0.277,
0.33559,
0.39125,
0.44399
],
[
-0.06578,
-0.05406,
-0.03648,
-0.0189,
0.01625,
0.08657,
0.14809,
0.20668,
0.26235,
0.31801
],
[
-0.18296,
-0.17125,
-0.15953,
-0.13609,
-0.10093,
-0.03062,
0.03383,
0.0895,
0.14516,
0.19789
],
[
-0.28843,
-0.27672,
-0.265,
-0.24156,
-0.2064,
-0.14195,
-0.0775,
-0.0189,
0.03969,
0.0895
],
[
-0.3939,
-0.38218,
-0.37046,
-0.34703,
-0.31187,
-0.24156,
-0.18296,
-0.12437,
-0.06578,
-0.01304
],
[
-0.48765,
-0.47593,
-0.46422,
-0.44078,
-0.40562,
-0.33531,
-0.27672,
-0.22398,
-0.16539,
-0.11265
]
]
},
"timing_type": "hold_rising"
}
]
},
"statetable \"CLK GATE SCE\",\"M0\"": {
"table": "L L L : - : L ,L L H : - : H ,L H L : - : H ,L H H : - : H ,H - - : - : N"
}
}