Significant improvements to library sky130_fd_sc_hs version 0.0.1.

This commit contains major improvements to all files by regenerating
from original data, improving consistency and automated cross checking
of data.

These improvements should drastically reduce customer confusion when
using the library and further reduce future possibility for human errors to
creep into designs.

Notable improvements include;

 * A large number of files have been regenerated from original source
   data including most liberty timing files and spice simulation models
   (compared to previous hand created versions).

 * Catalog and other library aggregations are now automatically
   generated from library contents (compared to previous hand created
   versions).

 * Significant improvements to documentation for all cells, including
   producing graphical representations, verified metadata and
   descriptions.

 * Names have been cross referenced between file types (such as
   simulation, layout, schematic and timing) and now verified to match.

 * Names have been improved to fix a standard format across all supported
   libraries and PDK contents.

 * Significant improvements to the contents of text files (like the
   verilog files) through improving consistent style that has been
   automatically checked.

 * Simplified verilog files for usage with open tools, including new
   black box stubs have been created.

 * Too many numerous other changes to list here.

Signed-off-by: Kevin Kelley <kevin.kelley@skywatertechnology.com>
diff --git a/README.rst b/README.rst
index 81d715d..2c3b62b 100644
--- a/README.rst
+++ b/README.rst
@@ -1,5 +1,5 @@
 :lib:`sky130_fd_sc_hs` - SKY130 High Speed Digital Standard Cells (SkyWater Provided)
 =====================================================================================
 
-Initial empty repository creation.
+Initial release of version (0, 0, 0).
 
diff --git a/cells/a2111o/definition.json b/cells/a2111o/definition.json
new file mode 100644
index 0000000..61f90da
--- /dev/null
+++ b/cells/a2111o/definition.json
@@ -0,0 +1,60 @@
+{
+ "description": "2-input AND into first input of 4-input OR.",
+ "equation": "X = ((A1 & A2) | B1 | C1 | D1)",
+ "file_prefix": "sky130_fd_sc_hs__a2111o",
+ "library": "sky130_fd_sc_hs",
+ "name": "a2111o",
+ "parameters": [],
+ "ports": [
+  [
+   "signal",
+   "X",
+   "output",
+   ""
+  ],
+  [
+   "signal",
+   "A1",
+   "input",
+   ""
+  ],
+  [
+   "signal",
+   "A2",
+   "input",
+   ""
+  ],
+  [
+   "signal",
+   "B1",
+   "input",
+   ""
+  ],
+  [
+   "signal",
+   "C1",
+   "input",
+   ""
+  ],
+  [
+   "signal",
+   "D1",
+   "input",
+   ""
+  ],
+  [
+   "power",
+   "VPWR",
+   "input",
+   "supply1"
+  ],
+  [
+   "power",
+   "VGND",
+   "input",
+   "supply0"
+  ]
+ ],
+ "type": "cell",
+ "verilog_name": "sky130_fd_sc_hs__a2111o"
+}
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.behavioral.pp.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.behavioral.pp.v
new file mode 100644
index 0000000..63d393f
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.behavioral.pp.v
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HS__A2111O_BEHAVIORAL_PP_V
+`define SKY130_FD_SC_HS__A2111O_BEHAVIORAL_PP_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+// Import sub cells.
+`include "../u_vpwr_vgnd/sky130_fd_sc_hs__u_vpwr_vgnd.v"
+
+`celldefine
+module sky130_fd_sc_hs__a2111o (
+    VPWR,
+    VGND,
+    X   ,
+    A1  ,
+    A2  ,
+    B1  ,
+    C1  ,
+    D1
+);
+
+    // Module ports
+    input  VPWR;
+    input  VGND;
+    output X   ;
+    input  A1  ;
+    input  A2  ;
+    input  B1  ;
+    input  C1  ;
+    input  D1  ;
+
+    // Local signals
+    wire	C1 and0_out          ;
+    wire    or0_out_X         ;
+    wire    u_vpwr_vgnd0_out_X;
+
+    //                           Name          Output              Other arguments
+    and                          and0         (and0_out          , A1, A2               );
+    or                           or0          (or0_out_X         , C1, B1, and0_out, D1 );
+    sky130_fd_sc_hs__u_vpwr_vgnd u_vpwr_vgnd0 (u_vpwr_vgnd0_out_X, or0_out_X, VPWR, VGND);
+    buf                          buf0         (X                 , u_vpwr_vgnd0_out_X   );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_BEHAVIORAL_PP_V
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.behavioral.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.behavioral.v
new file mode 100644
index 0000000..3577a04
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.behavioral.v
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HS__A2111O_BEHAVIORAL_V
+`define SKY130_FD_SC_HS__A2111O_BEHAVIORAL_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+// Import sub cells.
+`include "../u_vpwr_vgnd/sky130_fd_sc_hs__u_vpwr_vgnd.v"
+
+`celldefine
+module sky130_fd_sc_hs__a2111o (
+    X   ,
+    A1  ,
+    A2  ,
+    B1  ,
+    C1  ,
+    D1  ,
+    VPWR,
+    VGND
+);
+
+    // Module ports
+    output X   ;
+    input  A1  ;
+    input  A2  ;
+    input  B1  ;
+    input  C1  ;
+    input  D1  ;
+    input  VPWR;
+    input  VGND;
+
+    // Local signals
+    wire	C1 and0_out          ;
+    wire    or0_out_X         ;
+    wire    u_vpwr_vgnd0_out_X;
+
+    //                           Name          Output              Other arguments
+    and                          and0         (and0_out          , A1, A2               );
+    or                           or0          (or0_out_X         , C1, B1, and0_out, D1 );
+    sky130_fd_sc_hs__u_vpwr_vgnd u_vpwr_vgnd0 (u_vpwr_vgnd0_out_X, or0_out_X, VPWR, VGND);
+    buf                          buf0         (X                 , u_vpwr_vgnd0_out_X   );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_BEHAVIORAL_V
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.blackbox.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.blackbox.v
new file mode 100644
index 0000000..51d2b86
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.blackbox.v
@@ -0,0 +1,59 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HS__A2111O_BLACKBOX_V
+`define SKY130_FD_SC_HS__A2111O_BLACKBOX_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog stub definition (black box without power pins).
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hs__a2111o (
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
+);
+
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
+
+    // Voltage supply signals
+    supply1 VPWR;
+    supply0 VGND;
+
+endmodule
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_BLACKBOX_V
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.functional.pp.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.functional.pp.v
new file mode 100644
index 0000000..60fe514
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.functional.pp.v
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HS__A2111O_FUNCTIONAL_PP_V
+`define SKY130_FD_SC_HS__A2111O_FUNCTIONAL_PP_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+// Import sub cells.
+`include "../u_vpwr_vgnd/sky130_fd_sc_hs__u_vpwr_vgnd.v"
+
+`celldefine
+module sky130_fd_sc_hs__a2111o (
+    VPWR,
+    VGND,
+    X   ,
+    A1  ,
+    A2  ,
+    B1  ,
+    C1  ,
+    D1
+);
+
+    // Module ports
+    input  VPWR;
+    input  VGND;
+    output X   ;
+    input  A1  ;
+    input  A2  ;
+    input  B1  ;
+    input  C1  ;
+    input  D1  ;
+
+    // Local signals
+    wire	C1 and0_out          ;
+    wire    or0_out_X         ;
+    wire    u_vpwr_vgnd0_out_X;
+
+    //                           Name          Output              Other arguments
+    and                          and0         (and0_out          , A1, A2               );
+    or                           or0          (or0_out_X         , C1, B1, and0_out, D1 );
+    sky130_fd_sc_hs__u_vpwr_vgnd u_vpwr_vgnd0 (u_vpwr_vgnd0_out_X, or0_out_X, VPWR, VGND);
+    buf                          buf0         (X                 , u_vpwr_vgnd0_out_X   );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_FUNCTIONAL_PP_V
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.functional.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.functional.v
new file mode 100644
index 0000000..b505f45
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.functional.v
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+
+`ifndef SKY130_FD_SC_HS__A2111O_FUNCTIONAL_V
+`define SKY130_FD_SC_HS__A2111O_FUNCTIONAL_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog simulation functional model.
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+// Import sub cells.
+`include "../u_vpwr_vgnd/sky130_fd_sc_hs__u_vpwr_vgnd.v"
+
+`celldefine
+module sky130_fd_sc_hs__a2111o (
+    VPWR,
+    VGND,
+    X   ,
+    A1  ,
+    A2  ,
+    B1  ,
+    C1  ,
+    D1
+);
+
+    // Module ports
+    input  VPWR;
+    input  VGND;
+    output X   ;
+    input  A1  ;
+    input  A2  ;
+    input  B1  ;
+    input  C1  ;
+    input  D1  ;
+
+    // Local signals
+    wire	C1 and0_out          ;
+    wire    or0_out_X         ;
+    wire    u_vpwr_vgnd0_out_X;
+
+    //                           Name          Output              Other arguments
+    and                          and0         (and0_out          , A1, A2               );
+    or                           or0          (or0_out_X         , C1, B1, and0_out, D1 );
+    sky130_fd_sc_hs__u_vpwr_vgnd u_vpwr_vgnd0 (u_vpwr_vgnd0_out_X, or0_out_X, VPWR, VGND);
+    buf                          buf0         (X                 , u_vpwr_vgnd0_out_X   );
+
+endmodule
+`endcelldefine
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_FUNCTIONAL_V
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.blackbox.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.blackbox.v
new file mode 100644
index 0000000..493acd3
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.blackbox.v
@@ -0,0 +1,58 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HS__A2111O_PP_BLACKBOX_V
+`define SKY130_FD_SC_HS__A2111O_PP_BLACKBOX_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog stub definition (black box with power pins).
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hs__a2111o (
+    X   ,
+    A1  ,
+    A2  ,
+    B1  ,
+    C1  ,
+    D1  ,
+    VPWR,
+    VGND
+);
+
+    output X   ;
+    input  A1  ;
+    input  A2  ;
+    input  B1  ;
+    input  C1  ;
+    input  D1  ;
+    input  VPWR;
+    input  VGND;
+endmodule
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_PP_BLACKBOX_V
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.symbol.svg b/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.symbol.svg
new file mode 100644
index 0000000..09febcd
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.symbol.svg
@@ -0,0 +1,67 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created by Symbolator http://kevinpt.github.io/symbolator -->
+<svg xmlns="http://www.w3.org/2000/svg"
+xmlns:xlink="http://www.w3.org/1999/xlink"
+xml:space="preserve"
+width="191" height="295" viewBox="-25 -56 191.0 295.0" version="1.1">
+<style type="text/css">
+<![CDATA[
+.fnt1 { fill:#000000; font-family:Times; font-size:12pt; font-weight:normal; font-style:italic; }
+.fnt2 { fill:#000000; font-family:Helvetica; font-size:12pt; font-weight:normal; font-style:normal; }
+.fnt3 { fill:#000000; font-family:Helvetica; font-size:16pt; font-weight:bold; font-style:normal; }
+.fnt4 { fill:#000000; font-family:Helvetica; font-size:10pt; font-style:normal; }
+.label {fill:#000;
+  text-anchor:middle;
+  font-size:16pt; font-weight:bold; font-family:Sans;}
+.link {fill: #0D47A1;}
+.link:hover {fill: #0D47A1; text-decoration:underline;}
+.link:visited {fill: #4A148C;}
+]]>
+</style>
+<defs>
+
+</defs>
+<rect x="-25" y="-56" width="100%" height="100%" fill="white"/><g transform="translate(0,0)">
+<rect x="0" y="-21.0" width="140" height="149.0" stroke="#000000" fill="#CCFED2" stroke-width="1"/>
+<text class="fnt1" x="70.0" y="-5.0" text-anchor="middle" dy="5.5">Data Signals</text>
+<g transform="translate(0,19)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">A1</text>
+</g>
+<g transform="translate(0,41)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">A2</text>
+</g>
+<g transform="translate(0,63)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">B1</text>
+</g>
+<g transform="translate(0,85)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">C1</text>
+</g>
+<g transform="translate(0,107)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">D1</text>
+</g>
+<g transform="translate(140,19)">
+<line x1="20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="-10" y="0" text-anchor="end" dy="5.5">X</text>
+</g>
+</g>
+<g transform="translate(0,149.0)">
+<rect x="0" y="-21.0" width="140" height="83.0" stroke="#000000" fill="#FFBBBB" stroke-width="1"/>
+<text class="fnt1" x="70.0" y="-5.0" text-anchor="middle" dy="5.5">Power</text>
+<g transform="translate(0,19)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">VPWR</text>
+</g>
+<g transform="translate(0,41)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">VGND</text>
+</g>
+</g>
+<rect x="1.0" y="-20.0" width="138.0" height="230.0" stroke="#000000" fill="none" stroke-width="3"/>
+<text class="fnt3" x="70.0" y="-30.0" text-anchor="middle" dy="-1.0">a2111o</text>
+<text class="fnt4" x="70.0" y="230.0" text-anchor="middle" dy="1.0">sky130_fd_sc_hs</text>
+</svg>
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.symbol.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.symbol.v
new file mode 100644
index 0000000..0187b77
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.pp.symbol.v
@@ -0,0 +1,53 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HS__A2111O_PP_SYMBOL_V
+`define SKY130_FD_SC_HS__A2111O_PP_SYMBOL_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog stub (with power pins) for graphical symbol definition
+ * generation.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hs__a2111o (
+    //# {{data|Data Signals}}
+    input  A1  ,
+    input  A2  ,
+    input  B1  ,
+    input  C1  ,
+    input  D1  ,
+    output X   ,
+
+    //# {{power|Power}}
+    input  VPWR,
+    input  VGND
+);
+endmodule
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_PP_SYMBOL_V
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.specify.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.specify.v
new file mode 100644
index 0000000..30d6e9d
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.specify.v
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+*/
+
+specify
+(A1 +=> X) = (0:0:0,0:0:0);
+(A2 +=> X) = (0:0:0,0:0:0);
+if ((!A1&!A2&!C1&!D1)) (B1 +=> X) = (0:0:0,0:0:0);
+if ((!A1&A2&!C1&!D1)) (B1 +=> X) = (0:0:0,0:0:0);
+if ((A1&!A2&!C1&!D1)) (B1 +=> X) = (0:0:0,0:0:0);
+if ((!A1&!A2&!B1&!D1)) (C1 +=> X) = (0:0:0,0:0:0);
+if ((!A1&A2&!B1&!D1)) (C1 +=> X) = (0:0:0,0:0:0);
+if ((A1&!A2&!B1&!D1)) (C1 +=> X) = (0:0:0,0:0:0);
+if ((!A1&!A2&!B1&!C1)) (D1 +=> X) = (0:0:0,0:0:0);
+if ((!A1&A2&!B1&!C1)) (D1 +=> X) = (0:0:0,0:0:0);
+if ((A1&!A2&!B1&!C1)) (D1 +=> X) = (0:0:0,0:0:0);
+endspecify
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.symbol.svg b/cells/a2111o/sky130_fd_sc_hs__a2111o.symbol.svg
new file mode 100644
index 0000000..e79c3da
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.symbol.svg
@@ -0,0 +1,55 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created by Symbolator http://kevinpt.github.io/symbolator -->
+<svg xmlns="http://www.w3.org/2000/svg"
+xmlns:xlink="http://www.w3.org/1999/xlink"
+xml:space="preserve"
+width="191" height="212" viewBox="-25 -56 191.0 212.0" version="1.1">
+<style type="text/css">
+<![CDATA[
+.fnt1 { fill:#000000; font-family:Times; font-size:12pt; font-weight:normal; font-style:italic; }
+.fnt2 { fill:#000000; font-family:Helvetica; font-size:12pt; font-weight:normal; font-style:normal; }
+.fnt3 { fill:#000000; font-family:Helvetica; font-size:16pt; font-weight:bold; font-style:normal; }
+.fnt4 { fill:#000000; font-family:Helvetica; font-size:10pt; font-style:normal; }
+.label {fill:#000;
+  text-anchor:middle;
+  font-size:16pt; font-weight:bold; font-family:Sans;}
+.link {fill: #0D47A1;}
+.link:hover {fill: #0D47A1; text-decoration:underline;}
+.link:visited {fill: #4A148C;}
+]]>
+</style>
+<defs>
+
+</defs>
+<rect x="-25" y="-56" width="100%" height="100%" fill="white"/><g transform="translate(0,0)">
+<rect x="0" y="-21.0" width="140" height="149.0" stroke="#000000" fill="#CCFED2" stroke-width="1"/>
+<text class="fnt1" x="70.0" y="-5.0" text-anchor="middle" dy="5.5">Data Signals</text>
+<g transform="translate(0,19)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">A1</text>
+</g>
+<g transform="translate(0,41)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">A2</text>
+</g>
+<g transform="translate(0,63)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">B1</text>
+</g>
+<g transform="translate(0,85)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">C1</text>
+</g>
+<g transform="translate(0,107)">
+<line x1="-20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="10" y="0" text-anchor="normal" dy="5.5">D1</text>
+</g>
+<g transform="translate(140,19)">
+<line x1="20" y1="0" x2="0" y2="0" stroke="#000000" fill="none" stroke-width="1"/>
+<text class="fnt2" x="-10" y="0" text-anchor="end" dy="5.5">X</text>
+</g>
+</g>
+<rect x="1.0" y="-20.0" width="138.0" height="147.0" stroke="#000000" fill="none" stroke-width="3"/>
+<text class="fnt3" x="70.0" y="-30.0" text-anchor="middle" dy="-1.0">a2111o</text>
+<text class="fnt4" x="70.0" y="147.0" text-anchor="middle" dy="1.0">sky130_fd_sc_hs</text>
+</svg>
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.symbol.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.symbol.v
new file mode 100644
index 0000000..b27e8a4
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.symbol.v
@@ -0,0 +1,54 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HS__A2111O_SYMBOL_V
+`define SKY130_FD_SC_HS__A2111O_SYMBOL_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog stub (without power pins) for graphical symbol definition
+ * generation.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+(* blackbox *)
+module sky130_fd_sc_hs__a2111o (
+    //# {{data|Data Signals}}
+    input  A1,
+    input  A2,
+    input  B1,
+    input  C1,
+    input  D1,
+    output X
+);
+
+    // Voltage supply signals
+    supply1 VPWR;
+    supply0 VGND;
+
+endmodule
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_SYMBOL_V
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.tb.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.tb.v
new file mode 100644
index 0000000..846cb58
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.tb.v
@@ -0,0 +1,104 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HS__A2111O_TB_V
+`define SKY130_FD_SC_HS__A2111O_TB_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Autogenerated test bench.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`include "sky130_fd_sc_hs__a2111o.v"
+
+module top();
+
+    // Inputs are registered
+    reg A1;
+    reg A2;
+    reg B1;
+    reg C1;
+    reg D1;
+    reg VPWR;
+    reg VGND;
+
+    // Outputs are wires
+    wire X;
+
+    initial
+    begin
+        // Initial state is x for all inputs.
+        A1   = 1'bX;
+        A2   = 1'bX;
+        B1   = 1'bX;
+        C1   = 1'bX;
+        D1   = 1'bX;
+        VGND = 1'bX;
+        VPWR = 1'bX;
+
+        #20   A1   = 1'b0;
+        #40   A2   = 1'b0;
+        #60   B1   = 1'b0;
+        #80   C1   = 1'b0;
+        #100  D1   = 1'b0;
+        #120  VGND = 1'b0;
+        #140  VPWR = 1'b0;
+        #160  A1   = 1'b1;
+        #180  A2   = 1'b1;
+        #200  B1   = 1'b1;
+        #220  C1   = 1'b1;
+        #240  D1   = 1'b1;
+        #260  VGND = 1'b1;
+        #280  VPWR = 1'b1;
+        #300  A1   = 1'b0;
+        #320  A2   = 1'b0;
+        #340  B1   = 1'b0;
+        #360  C1   = 1'b0;
+        #380  D1   = 1'b0;
+        #400  VGND = 1'b0;
+        #420  VPWR = 1'b0;
+        #440  VPWR = 1'b1;
+        #460  VGND = 1'b1;
+        #480  D1   = 1'b1;
+        #500  C1   = 1'b1;
+        #520  B1   = 1'b1;
+        #540  A2   = 1'b1;
+        #560  A1   = 1'b1;
+        #580  VPWR = 1'bx;
+        #600  VGND = 1'bx;
+        #620  D1   = 1'bx;
+        #640  C1   = 1'bx;
+        #660  B1   = 1'bx;
+        #680  A2   = 1'bx;
+        #700  A1   = 1'bx;
+    end
+
+    sky130_fd_sc_hs__a2111o dut (.A1(A1), .A2(A2), .B1(B1), .C1(C1), .D1(D1), .VPWR(VPWR), .VGND(VGND), .X(X));
+
+endmodule
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_TB_V
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o.v b/cells/a2111o/sky130_fd_sc_hs__a2111o.v
new file mode 100644
index 0000000..cdadee1
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o.v
@@ -0,0 +1,54 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HS__A2111O_V
+`define SKY130_FD_SC_HS__A2111O_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog top module.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`ifdef USE_POWER_PINS
+
+`ifdef FUNCTIONAL
+`include "sky130_fd_sc_hs__a2111o.pp.functional.v"
+`else  // FUNCTIONAL
+`include "sky130_fd_sc_hs__a2111o.pp.behavioral.v"
+`endif // FUNCTIONAL
+
+`else  // USE_POWER_PINS
+
+`ifdef FUNCTIONAL
+`include "sky130_fd_sc_hs__a2111o.functional.v"
+`else  // FUNCTIONAL
+`include "sky130_fd_sc_hs__a2111o.behavioral.v"
+`endif // FUNCTIONAL
+
+`endif // USE_POWER_PINS
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_V
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1.cdl b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.cdl
new file mode 100644
index 0000000..21e5ce9
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.cdl
@@ -0,0 +1,43 @@
+* Copyright 2020 The SkyWater PDK Authors
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     https://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+* SPDX-License-Identifier: Apache-2.0
+
+.SUBCKT sky130_fd_sc_hs__a2111o_1 A1 A2 B1 C1 D1 VGND VNB VPB VPWR X
+*.PININFO A1:I A2:I B1:I C1:I D1:I VGND:I VNB:I VPB:I VPWR:I X:O
+MMPA0 pndA A1 VPB pshort m=1 w=1.0 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMPA1 pndA A2 VPB pshort m=1 w=1.0 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMPB0 pndB B1 VPB pshort m=1 w=1.0 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMPC0 pndC C1 VPB pshort m=1 w=1.0 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMPD0 y D1 VPB pshort m=1 w=1.0 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMIPX X y VPB pshort m=1 w=1.12 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMNA0 y A1 VNB nlowvt m=1 w=0.64 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMNA1 sndA1 A2 VNB nlowvt m=1 w=0.64 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMNB0 y B1 VNB nlowvt m=1 w=0.64 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMNC0 y C1 VNB nlowvt m=1 w=0.64 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMND0 y D1 VNB nlowvt m=1 w=0.64 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+MMINX X y VNB nlowvt m=1 w=0.74 l=0.15 mult=1 sa=0.265 sb=0.265
++ sd=0.28 topography=normal area=0.063 perim=1.14
+.ENDS sky130_fd_sc_hs__a2111o_1
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1.gds b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.gds
new file mode 100644
index 0000000..13daf9b
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.gds
Binary files differ
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1.lef b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.lef
new file mode 100644
index 0000000..f5452a9
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.lef
@@ -0,0 +1,162 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.5 ;
+NAMESCASESENSITIVE ON ;
+BUSBITCHARS "[]" ;
+DIVIDERCHAR "/" ;
+MACRO sky130_fd_sc_hs__a2111o_1
+  CLASS CORE ;
+  SOURCE USER ;
+  ORIGIN  0.000000  0.000000 ;
+  SIZE  4.320000 BY  3.330000 ;
+  SYMMETRY X Y ;
+  SITE unit ;
+  PIN A1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 0.125000 0.440000 0.840000 0.670000 ;
+        RECT 0.510000 0.255000 0.840000 0.440000 ;
+    END
+  END A1
+  PIN A2
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 1.050000 1.500000 2.275000 1.800000 ;
+    END
+  END A2
+  PIN B1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 1.435000 0.255000 1.795000 0.490000 ;
+        RECT 1.595000 0.490000 1.795000 0.670000 ;
+    END
+  END B1
+  PIN C1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 2.005000 0.255000 2.335000 0.490000 ;
+        RECT 2.005000 0.490000 2.245000 0.670000 ;
+    END
+  END C1
+  PIN D1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 2.445000 1.500000 2.775000 1.800000 ;
+    END
+  END D1
+  PIN X
+    ANTENNADIFFAREA  0.504100 ;
+    DIRECTION OUTPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 3.860000 0.370000 4.195000 2.980000 ;
+    END
+  END X
+  PIN VGND
+    DIRECTION INOUT ;
+    USE GROUND ;
+    PORT
+      LAYER met1 ;
+        RECT 0.000000 -0.245000 4.320000 0.245000 ;
+    END
+  END VGND
+  PIN VNB
+    DIRECTION INOUT ;
+    USE GROUND ;
+    PORT
+      LAYER met1 ;
+        RECT 0.000000 0.000000 0.250000 0.250000 ;
+    END
+  END VNB
+  PIN VPB
+    DIRECTION INOUT ;
+    USE POWER ;
+    PORT
+      LAYER met1 ;
+        RECT 0.000000 3.080000 0.250000 3.330000 ;
+    END
+  END VPB
+  PIN VPWR
+    DIRECTION INOUT ;
+    USE POWER ;
+    PORT
+      LAYER met1 ;
+        RECT 0.000000 3.085000 4.320000 3.575000 ;
+    END
+  END VPWR
+  OBS
+    LAYER li1 ;
+      RECT 0.000000 -0.085000 4.320000 0.085000 ;
+      RECT 0.000000  3.245000 4.320000 3.415000 ;
+      RECT 0.360000  1.940000 0.690000 1.970000 ;
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+      RECT 0.890000  2.310000 1.100000 3.245000 ;
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+      RECT 1.300000  2.140000 1.630000 2.980000 ;
+      RECT 1.715000  0.840000 2.045000 1.160000 ;
+      RECT 2.415000  0.660000 2.675000 0.990000 ;
+      RECT 2.505000  0.085000 2.675000 0.660000 ;
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+      RECT 2.530000  2.140000 2.860000 2.980000 ;
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+      RECT 2.945000  1.330000 3.690000 1.650000 ;
+      RECT 2.945000  1.650000 3.115000 1.970000 ;
+      RECT 3.410000  1.820000 3.660000 3.245000 ;
+      RECT 3.435000  0.085000 3.685000 1.150000 ;
+    LAYER mcon ;
+      RECT 0.155000 -0.085000 0.325000 0.085000 ;
+      RECT 0.155000  3.245000 0.325000 3.415000 ;
+      RECT 0.635000 -0.085000 0.805000 0.085000 ;
+      RECT 0.635000  3.245000 0.805000 3.415000 ;
+      RECT 1.115000 -0.085000 1.285000 0.085000 ;
+      RECT 1.115000  3.245000 1.285000 3.415000 ;
+      RECT 1.595000 -0.085000 1.765000 0.085000 ;
+      RECT 1.595000  3.245000 1.765000 3.415000 ;
+      RECT 2.075000 -0.085000 2.245000 0.085000 ;
+      RECT 2.075000  3.245000 2.245000 3.415000 ;
+      RECT 2.555000 -0.085000 2.725000 0.085000 ;
+      RECT 2.555000  3.245000 2.725000 3.415000 ;
+      RECT 3.035000 -0.085000 3.205000 0.085000 ;
+      RECT 3.035000  3.245000 3.205000 3.415000 ;
+      RECT 3.515000 -0.085000 3.685000 0.085000 ;
+      RECT 3.515000  3.245000 3.685000 3.415000 ;
+      RECT 3.995000 -0.085000 4.165000 0.085000 ;
+      RECT 3.995000  3.245000 4.165000 3.415000 ;
+  END
+END sky130_fd_sc_hs__a2111o_1
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1.magic.lef b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.magic.lef
new file mode 100644
index 0000000..ef5438d
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.magic.lef
@@ -0,0 +1,154 @@
+# Copyright 2020 The SkyWater PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+VERSION 5.7 ;
+  NAMESCASESENSITIVE ON ;
+  NOWIREEXTENSIONATPIN ON ;
+  DIVIDERCHAR "/" ;
+  BUSBITCHARS "[]" ;
+UNITS
+  DATABASE MICRONS 200 ;
+END UNITS
+MACRO sky130_fd_sc_hs__a2111o_1
+  CLASS CORE ;
+  SOURCE USER ;
+  FOREIGN sky130_fd_sc_hs__a2111o_1 ;
+  ORIGIN  0.000000  0.000000 ;
+  SIZE  4.320000 BY  3.330000 ;
+  SYMMETRY X Y ;
+  SITE unit ;
+  PIN A1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 0.125000 0.440000 0.840000 0.670000 ;
+        RECT 0.510000 0.255000 0.840000 0.440000 ;
+    END
+  END A1
+  PIN A2
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 1.050000 1.500000 2.275000 1.800000 ;
+    END
+  END A2
+  PIN B1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 1.435000 0.255000 1.795000 0.490000 ;
+        RECT 1.595000 0.490000 1.795000 0.670000 ;
+    END
+  END B1
+  PIN C1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 2.005000 0.255000 2.335000 0.490000 ;
+        RECT 2.005000 0.490000 2.245000 0.670000 ;
+    END
+  END C1
+  PIN D1
+    ANTENNAGATEAREA  0.246000 ;
+    DIRECTION INPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 2.445000 1.500000 2.775000 1.800000 ;
+    END
+  END D1
+  PIN X
+    ANTENNADIFFAREA  0.504100 ;
+    DIRECTION OUTPUT ;
+    USE SIGNAL ;
+    PORT
+      LAYER li1 ;
+        RECT 3.860000 0.370000 4.195000 2.980000 ;
+    END
+  END X
+  PIN VGND
+    DIRECTION INOUT ;
+    USE GROUND ;
+    PORT
+      LAYER li1 ;
+        RECT 0.000000 -0.085000 4.320000 0.085000 ;
+        RECT 1.095000  0.085000 1.265000 0.660000 ;
+        RECT 1.095000  0.660000 1.425000 0.990000 ;
+        RECT 2.415000  0.660000 2.675000 0.990000 ;
+        RECT 2.505000  0.085000 2.675000 0.660000 ;
+        RECT 3.435000  0.085000 3.685000 1.150000 ;
+      LAYER mcon ;
+        RECT 0.155000 -0.085000 0.325000 0.085000 ;
+        RECT 0.635000 -0.085000 0.805000 0.085000 ;
+        RECT 1.115000 -0.085000 1.285000 0.085000 ;
+        RECT 1.595000 -0.085000 1.765000 0.085000 ;
+        RECT 2.075000 -0.085000 2.245000 0.085000 ;
+        RECT 2.555000 -0.085000 2.725000 0.085000 ;
+        RECT 3.035000 -0.085000 3.205000 0.085000 ;
+        RECT 3.515000 -0.085000 3.685000 0.085000 ;
+        RECT 3.995000 -0.085000 4.165000 0.085000 ;
+      LAYER met1 ;
+        RECT 0.000000 -0.245000 4.320000 0.245000 ;
+    END
+  END VGND
+  PIN VPWR
+    DIRECTION INOUT ;
+    USE POWER ;
+    PORT
+      LAYER li1 ;
+        RECT 0.000000 3.245000 4.320000 3.415000 ;
+        RECT 0.890000 2.310000 1.100000 3.245000 ;
+        RECT 3.410000 1.820000 3.660000 3.245000 ;
+      LAYER mcon ;
+        RECT 0.155000 3.245000 0.325000 3.415000 ;
+        RECT 0.635000 3.245000 0.805000 3.415000 ;
+        RECT 1.115000 3.245000 1.285000 3.415000 ;
+        RECT 1.595000 3.245000 1.765000 3.415000 ;
+        RECT 2.075000 3.245000 2.245000 3.415000 ;
+        RECT 2.555000 3.245000 2.725000 3.415000 ;
+        RECT 3.035000 3.245000 3.205000 3.415000 ;
+        RECT 3.515000 3.245000 3.685000 3.415000 ;
+        RECT 3.995000 3.245000 4.165000 3.415000 ;
+      LAYER met1 ;
+        RECT 0.000000 3.085000 4.320000 3.575000 ;
+    END
+  END VPWR
+  OBS
+    LAYER li1 ;
+      RECT 0.360000 1.940000 0.690000 1.970000 ;
+      RECT 0.360000 1.970000 1.630000 2.140000 ;
+      RECT 0.360000 2.140000 0.690000 2.980000 ;
+      RECT 0.385000 0.840000 0.715000 1.160000 ;
+      RECT 0.385000 1.160000 3.115000 1.320000 ;
+      RECT 0.385000 1.320000 3.690000 1.330000 ;
+      RECT 0.385000 1.330000 0.715000 1.340000 ;
+      RECT 1.300000 2.140000 1.630000 2.980000 ;
+      RECT 1.715000 0.840000 2.045000 1.160000 ;
+      RECT 2.530000 1.970000 3.115000 2.140000 ;
+      RECT 2.530000 2.140000 2.860000 2.980000 ;
+      RECT 2.845000 0.660000 3.115000 1.160000 ;
+      RECT 2.945000 1.330000 3.690000 1.650000 ;
+      RECT 2.945000 1.650000 3.115000 1.970000 ;
+  END
+END sky130_fd_sc_hs__a2111o_1
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1.netlist.tsv b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.netlist.tsv
new file mode 100644
index 0000000..82274b1
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.netlist.tsv
@@ -0,0 +1,14 @@
+sky130_fd_sc_hs__a2111o_1	A1:I A2:I B1:I C1:I D1:I VGND:I VNB:I VPB:I VPWR:I X:O

+Name	Formula	nd	ng	ns	nb	mname	m	w	l	mult	sa	sb	sd	topography	area	perim

+MMPA0	MOSFET	pndA	A1	VPWR	VPB	pshort	1	1.0	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMPA1	MOSFET	pndA	A2	VPWR	VPB	pshort	1	1.0	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMPB0	MOSFET	pndB	B1	pndA	VPB	pshort	1	1.0	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMPC0	MOSFET	pndC	C1	pndB	VPB	pshort	1	1.0	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMPD0	MOSFET	y	D1	pndC	VPB	pshort	1	1.0	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMIPX	MOSFET	X	y	VPWR	VPB	pshort	1	1.12	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMNA0	MOSFET	y	A1	sndA1	VNB	nlowvt	1	0.64	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMNA1	MOSFET	sndA1	A2	VGND	VNB	nlowvt	1	0.64	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMNB0	MOSFET	y	B1	VGND	VNB	nlowvt	1	0.64	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMNC0	MOSFET	y	C1	VGND	VNB	nlowvt	1	0.64	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMND0	MOSFET	y	D1	VGND	VNB	nlowvt	1	0.64	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

+MMINX	MOSFET	X	y	VGND	VNB	nlowvt	1	0.74	0.15	1	0.265	0.265	0.28	normal	0.063	1.14

diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1.spice b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.spice
new file mode 100644
index 0000000..69e90b6
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.spice
@@ -0,0 +1,29 @@
+* NGSPICE file created from sky130_fd_sc_hs__a2111o_1.ext - technology: sky130A
+
+.subckt sky130_fd_sc_hs__a2111o_1 A1 A2 B1 C1 D1 VGND VNB VPB VPWR X
+M1000 a_431_392# C1 a_353_392# VPB pshort w=1e+06u l=150000u
++  ad=2.4e+11p pd=2.48e+06u as=2.4e+11p ps=2.48e+06u
+M1001 a_168_136# A1 a_85_136# VNB nlowvt w=640000u l=150000u
++  ad=1.344e+11p pd=1.7e+06u as=5.184e+11p ps=5.46e+06u
+M1002 a_85_136# D1 VGND VNB nlowvt w=640000u l=150000u
++  ad=0p pd=0u as=7.465e+11p ps=6.29e+06u
+M1003 VGND A2 a_168_136# VNB nlowvt w=640000u l=150000u
++  ad=0p pd=0u as=0p ps=0u
+M1004 a_85_136# B1 VGND VNB nlowvt w=640000u l=150000u
++  ad=0p pd=0u as=0p ps=0u
+M1005 VGND C1 a_85_136# VNB nlowvt w=640000u l=150000u
++  ad=0p pd=0u as=0p ps=0u
+M1006 a_80_392# A2 VPWR VPB pshort w=1e+06u l=150000u
++  ad=5.75e+11p pd=5.15e+06u as=6.48e+11p ps=5.47e+06u
+M1007 a_353_392# B1 a_80_392# VPB pshort w=1e+06u l=150000u
++  ad=0p pd=0u as=0p ps=0u
+M1008 X a_85_136# VGND VNB nlowvt w=740000u l=150000u
++  ad=1.961e+11p pd=2.01e+06u as=0p ps=0u
+M1009 a_85_136# D1 a_431_392# VPB pshort w=1e+06u l=150000u
++  ad=2.75e+11p pd=2.55e+06u as=0p ps=0u
+M1010 VPWR A1 a_80_392# VPB pshort w=1e+06u l=150000u
++  ad=0p pd=0u as=0p ps=0u
+M1011 X a_85_136# VPWR VPB pshort w=1.12e+06u l=150000u
++  ad=3.08e+11p pd=2.79e+06u as=0p ps=0u
+.ends
+
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new file mode 100644
index 0000000..c0ff1e7
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.svg
@@ -0,0 +1,197 @@
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diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1.v b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.v
new file mode 100644
index 0000000..c3aa8d7
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1.v
@@ -0,0 +1,119 @@
+/**
+ * Copyright 2020 The SkyWater PDK Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+`ifndef SKY130_FD_SC_HS__A2111O_1_V
+`define SKY130_FD_SC_HS__A2111O_1_V
+
+/**
+ * a2111o: 2-input AND into first input of 4-input OR.
+ *
+ *         X = ((A1 & A2) | B1 | C1 | D1)
+ *
+ * Verilog wrapper for a2111o with size of 1 units.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+`include "sky130_fd_sc_hs__a2111o.v"
+
+`ifdef USE_POWER_PINS
+/*********************************************************/
+
+`celldefine
+module sky130_fd_sc_hs__a2111o_1 (
+    X   ,
+    A1  ,
+    A2  ,
+    B1  ,
+    C1  ,
+    D1  ,
+    VPWR,
+    VGND
+);
+
+    output X   ;
+    input  A1  ;
+    input  A2  ;
+    input  B1  ;
+    input  C1  ;
+    input  D1  ;
+    input  VPWR;
+    input  VGND;
+    sky130_fd_sc_hs__a2111o cell (
+        .X(X),
+        .A1(A1),
+        .A2(A2),
+        .B1(B1),
+        .C1(C1),
+        .D1(D1),
+        .VPWR(VPWR),
+        .VGND(VGND)
+    );
+
+endmodule
+`endcelldefine
+
+/*********************************************************/
+`else // If not USE_POWER_PINS
+/*********************************************************/
+
+`celldefine
+module sky130_fd_sc_hs__a2111o_1 (
+    X   ,
+    A1  ,
+    A2  ,
+    B1  ,
+    C1  ,
+    D1  ,
+    VPWR,
+    VGND
+);
+
+    output X   ;
+    input  A1  ;
+    input  A2  ;
+    input  B1  ;
+    input  C1  ;
+    input  D1  ;
+    input  VPWR;
+    input  VGND;
+
+    // Voltage supply signals
+    supply1 VPWR;
+    supply0 VGND;
+
+    sky130_fd_sc_hs__a2111o cell (
+        .X(X),
+        .A1(A1),
+        .A2(A2),
+        .B1(B1),
+        .C1(C1),
+        .D1(D1)
+    );
+
+endmodule
+`endcelldefine
+
+/*********************************************************/
+`endif // USE_POWER_PINS
+
+`default_nettype wire
+`endif  // SKY130_FD_SC_HS__A2111O_1_V
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1__ff_100C_1v95.lib.json b/cells/a2111o/sky130_fd_sc_hs__a2111o_1__ff_100C_1v95.lib.json
new file mode 100644
index 0000000..643517a
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1__ff_100C_1v95.lib.json
@@ -0,0 +1,9201 @@
+{
+  "area": 14.3856,
+  "cell_footprint": "a2111o",
+  "cell_leakage_power": 311.58953,
+  "leakage_power": [
+    {
+      "value": 1768.77688,
+      "when": "!A1&!A2&!B1&!C1&!D1"
+    },
+    {
+      "value": 865.48526,
+      "when": "!A1&!A2&!B1&!C1&D1"
+    },
+    {
+      "value": 257.7979,
+      "when": "!A1&!A2&!B1&C1&!D1"
+    },
+    {
+      "value": 13.52907,
+      "when": "!A1&!A2&!B1&C1&D1"
+    },
+    {
+      "value": 201.67642,
+      "when": "!A1&!A2&B1&!C1&!D1"
+    },
+    {
+      "value": 12.44029,
+      "when": "!A1&!A2&B1&!C1&D1"
+    },
+    {
+      "value": 11.12101,
+      "when": "!A1&!A2&B1&C1&!D1"
+    },
+    {
+      "value": 6.70033,
+      "when": "!A1&!A2&B1&C1&D1"
+    },
+    {
+      "value": 1773.22289,
+      "when": "!A1&A2&!B1&!C1&!D1"
+    },
+    {
+      "value": 857.1196,
+      "when": "!A1&A2&!B1&!C1&D1"
+    },
+    {
+      "value": 257.07641,
+      "when": "!A1&A2&!B1&C1&!D1"
+    },
+    {
+      "value": 13.52731,
+      "when": "!A1&A2&!B1&C1&D1"
+    },
+    {
+      "value": 201.22793,
+      "when": "!A1&A2&B1&!C1&!D1"
+    },
+    {
+      "value": 12.43873,
+      "when": "!A1&A2&B1&!C1&D1"
+    },
+    {
+      "value": 11.11984,
+      "when": "!A1&A2&B1&C1&!D1"
+    },
+    {
+      "value": 6.69994,
+      "when": "!A1&A2&B1&C1&D1"
+    },
+    {
+      "value": 1772.77439,
+      "when": "A1&!A2&!B1&!C1&!D1"
+    },
+    {
+      "value": 858.93315,
+      "when": "A1&!A2&!B1&!C1&D1"
+    },
+    {
+      "value": 257.23241,
+      "when": "A1&!A2&!B1&C1&!D1"
+    },
+    {
+      "value": 13.5277,
+      "when": "A1&!A2&!B1&C1&D1"
+    },
+    {
+      "value": 201.32543,
+      "when": "A1&!A2&B1&!C1&!D1"
+    },
+    {
+      "value": 12.43912,
+      "when": "A1&!A2&B1&!C1&D1"
+    },
+    {
+      "value": 11.12004,
+      "when": "A1&!A2&B1&C1&!D1"
+    },
+    {
+      "value": 6.70013,
+      "when": "A1&!A2&B1&C1&D1"
+    },
+    {
+      "value": 454.53728,
+      "when": "A1&A2&!B1&!C1&!D1"
+    },
+    {
+      "value": 28.93124,
+      "when": "A1&A2&!B1&!C1&D1"
+    },
+    {
+      "value": 25.21951,
+      "when": "A1&A2&!B1&C1&!D1"
+    },
+    {
+      "value": 9.86642,
+      "when": "A1&A2&!B1&C1&D1"
+    },
+    {
+      "value": 24.36647,
+      "when": "A1&A2&B1&!C1&!D1"
+    },
+    {
+      "value": 9.33189,
+      "when": "A1&A2&B1&!C1&D1"
+    },
+    {
+      "value": 8.66299,
+      "when": "A1&A2&B1&C1&!D1"
+    },
+    {
+      "value": 5.93705,
+      "when": "A1&A2&B1&C1&D1"
+    }
+  ],
+  "pg_pin VGND": {
+    "pg_type": "primary_ground",
+    "voltage_name": "VGND"
+  },
+  "pg_pin VNB": {
+    "pg_type": "primary_ground",
+    "voltage_name": "VNB"
+  },
+  "pg_pin VPB": {
+    "pg_type": "primary_power",
+    "voltage_name": "VPB"
+  },
+  "pg_pin VPWR": {
+    "pg_type": "primary_power",
+    "voltage_name": "VPWR"
+  },
+  "pin A1": {
+    "capacitance": 0.00261,
+    "clock": "false",
+    "direction": "input",
+    "internal_power": {
+      "fall_power hidden_pwr_template13": {
+        "index_1": [
+          0.01,
+          0.01735,
+          0.02602,
+          0.03903,
+          0.05855,
+          0.08782,
+          0.13172,
+          0.19757,
+          0.29634,
+          0.44449,
+          0.6667,
+          1.0,
+          1.5
+        ],
+        "values": [
+          0.01013,
+          0.0098,
+          0.00966,
+          0.00966,
+          0.00963,
+          0.00975,
+          0.01016,
+          0.01084,
+          0.01209,
+          0.01599,
+          0.01981,
+          0.02857,
+          0.03857
+        ]
+      },
+      "rise_power hidden_pwr_template13": {
+        "index_1": [
+          0.01,
+          0.01735,
+          0.02602,
+          0.03903,
+          0.05855,
+          0.08782,
+          0.13172,
+          0.19757,
+          0.29634,
+          0.44449,
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+              0.20705,
+              0.38826,
+              0.75509,
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+            [
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+              0.1336,
+              0.2176,
+              0.3961,
+              0.7635,
+              1.4969
+            ]
+          ]
+        },
+        "sdf_cond": "(A1&!A2&!B1&!C1)",
+        "timing_sense": "positive_unate",
+        "when": "(A1&!A2&!B1&!C1)"
+      }
+    ]
+  }
+}
\ No newline at end of file
diff --git a/cells/a2111o/sky130_fd_sc_hs__a2111o_1__ff_150C_1v95.lib.json b/cells/a2111o/sky130_fd_sc_hs__a2111o_1__ff_150C_1v95.lib.json
new file mode 100644
index 0000000..22924f7
--- /dev/null
+++ b/cells/a2111o/sky130_fd_sc_hs__a2111o_1__ff_150C_1v95.lib.json
@@ -0,0 +1,9201 @@
+{
+  "area": 14.3856,
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