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| "area": 21.2704, |
| "cell_footprint": "dlrtn", |
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| "data_in": "D", |
| "enable": "!GATE_N" |
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| { |
| "value": 5.98415, |
| "when": "RESET_B&!D&GATE_N&!Q" |
| }, |
| { |
| "value": 5.42249, |
| "when": "!RESET_B&!D&!GATE_N&!Q" |
| }, |
| { |
| "value": 6.06966, |
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| { |
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| { |
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| { |
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| { |
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| { |
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| { |
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| ], |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "pwell", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "nwell", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VPWR" |
| }, |
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| "clock": "false", |
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| 0.01, |
| 0.0230506, |
| 0.0531329, |
| 0.122474, |
| 0.282311, |
| 0.650743, |
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| 0.0162181, |
| 0.017135, |
| 0.0192485 |
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| 0.01, |
| 0.0230506, |
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| [ |
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| ] |
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| "sim_opt": "runlvl=5 accurate=1", |
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| }, |
| { |
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| [ |
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| ] |
| }, |
| "related_pin": "GATE_N", |
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| 0.75, |
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| "index_2": [ |
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| ] |
| }, |
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| "clock": "true", |
| "direction": "input", |
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| "rise_power power_inputs_1": { |
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| }, |
| "max_transition": 1.5, |
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| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002, |
| "timing": { |
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| "timing_type": "min_pulse_width", |
| "violation_delay_degrade_pct": 10.0 |
| } |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQ", |
| "internal_power": [ |
| { |
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| 0.01, |
| 0.0230506, |
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| { |
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| "related_pin": "RESET_B", |
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| ], |
| "max_capacitance": 0.414744, |
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| "power_down_function": "(!VPWR + VGND)", |
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| } |
| ] |
| }, |
| "pin RESET_B": { |
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| "clock": "false", |
| "direction": "input", |
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| "internal_power": { |
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| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
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| "timing": [ |
| { |
| "related_pin": "GATE_N", |
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| }, |
| { |
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| }, |
| { |
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| }, |
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| "timing_type": "min_pulse_width", |
| "violation_delay_degrade_pct": 10.0 |
| } |
| ] |
| } |
| } |
