tree fbd166177719e33a2867bba13e05869040db6dfb
parent 17864216b91d1af4efdfc443ff274032212a7012
parent 4ccac0c76bfd167ff96a70e24162775d05fd131d
author Tim 'mithro' Ansell <me@mith.ro> 1603940678 -0700
committer Tim 'mithro' Ansell <tansell@google.com> 1603940678 -0700

verilog: Fixing power pins usage in non-powerpin mode.

Previously even when `USE_POWER_PIN` was not defined, the drive strength
wrappers where still defining the power pins as ports.

Fixes https://github.com/google/skywater-pdk/issues/181

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>