blob: b4b2563c86e7ca772ce35a276c94042b0227f15e [file] [log] [blame]
# Copyright 2020 The SkyWater PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# SPDX-License-Identifier: Apache-2.0
VERSION 5.7 ;
NOWIREEXTENSIONATPIN ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
PROPERTYDEFINITIONS
MACRO maskLayoutSubType STRING ;
MACRO prCellType STRING ;
MACRO originalViewName STRING ;
END PROPERTYDEFINITIONS
MACRO sky130_fd_sc_hdll__mux2i_1
CLASS CORE ;
FOREIGN sky130_fd_sc_hdll__mux2i_1 ;
ORIGIN 0.000000 0.000000 ;
SIZE 4.140000 BY 2.720000 ;
SYMMETRY X Y R90 ;
SITE unithd ;
PIN A0
ANTENNAGATEAREA 0.277500 ;
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 0.085000 1.060000 0.420000 1.285000 ;
END
END A0
PIN A1
ANTENNAGATEAREA 0.277500 ;
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 1.005000 0.995000 1.265000 1.325000 ;
RECT 1.065000 1.325000 1.265000 2.110000 ;
END
END A1
PIN S
ANTENNAGATEAREA 0.555000 ;
DIRECTION INPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 3.365000 0.760000 3.750000 1.620000 ;
END
END S
PIN VGND
ANTENNADIFFAREA 0.344500 ;
DIRECTION INOUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.000000 -0.240000 4.140000 0.240000 ;
END
END VGND
PIN VPWR
ANTENNADIFFAREA 0.820000 ;
DIRECTION INOUT ;
USE SIGNAL ;
PORT
LAYER met1 ;
RECT 0.000000 2.480000 4.140000 2.960000 ;
END
END VPWR
PIN Y
ANTENNADIFFAREA 0.465500 ;
DIRECTION OUTPUT ;
USE SIGNAL ;
PORT
LAYER li1 ;
RECT 0.605000 0.595000 0.835000 1.455000 ;
RECT 0.605000 1.455000 0.890000 2.125000 ;
END
END Y
PIN VNB
DIRECTION INOUT ;
USE GROUND ;
PORT
LAYER pwell ;
RECT 0.145000 -0.085000 0.315000 0.085000 ;
END
END VNB
PIN VPB
DIRECTION INOUT ;
USE POWER ;
PORT
LAYER nwell ;
RECT -0.190000 1.305000 4.330000 2.910000 ;
END
END VPB
OBS
LAYER li1 ;
RECT 0.000000 -0.085000 4.140000 0.085000 ;
RECT 0.000000 2.635000 4.140000 2.805000 ;
RECT 0.085000 0.255000 1.855000 0.425000 ;
RECT 0.085000 0.425000 0.440000 0.465000 ;
RECT 0.085000 0.465000 0.345000 0.885000 ;
RECT 0.120000 1.455000 0.420000 2.295000 ;
RECT 0.120000 2.295000 1.725000 2.465000 ;
RECT 1.005000 0.655000 1.750000 0.715000 ;
RECT 1.005000 0.715000 2.700000 0.825000 ;
RECT 1.065000 0.425000 1.855000 0.465000 ;
RECT 1.485000 1.075000 3.195000 1.310000 ;
RECT 1.505000 1.480000 2.745000 1.650000 ;
RECT 1.505000 1.650000 1.725000 2.295000 ;
RECT 1.575000 0.825000 2.700000 0.885000 ;
RECT 1.895000 1.835000 2.175000 2.635000 ;
RECT 2.025000 0.085000 2.195000 0.525000 ;
RECT 2.365000 1.650000 2.745000 2.465000 ;
RECT 2.465000 0.255000 2.700000 0.715000 ;
RECT 2.930000 0.255000 3.195000 1.075000 ;
RECT 2.970000 1.310000 3.195000 2.465000 ;
RECT 3.475000 1.835000 3.770000 2.635000 ;
RECT 3.515000 0.085000 3.735000 0.545000 ;
LAYER mcon ;
RECT 0.145000 -0.085000 0.315000 0.085000 ;
RECT 0.145000 2.635000 0.315000 2.805000 ;
RECT 0.605000 -0.085000 0.775000 0.085000 ;
RECT 0.605000 2.635000 0.775000 2.805000 ;
RECT 1.065000 -0.085000 1.235000 0.085000 ;
RECT 1.065000 2.635000 1.235000 2.805000 ;
RECT 1.525000 -0.085000 1.695000 0.085000 ;
RECT 1.525000 2.635000 1.695000 2.805000 ;
RECT 1.985000 -0.085000 2.155000 0.085000 ;
RECT 1.985000 2.635000 2.155000 2.805000 ;
RECT 2.445000 -0.085000 2.615000 0.085000 ;
RECT 2.445000 2.635000 2.615000 2.805000 ;
RECT 2.905000 -0.085000 3.075000 0.085000 ;
RECT 2.905000 2.635000 3.075000 2.805000 ;
RECT 3.365000 -0.085000 3.535000 0.085000 ;
RECT 3.365000 2.635000 3.535000 2.805000 ;
RECT 3.825000 -0.085000 3.995000 0.085000 ;
RECT 3.825000 2.635000 3.995000 2.805000 ;
END
PROPERTY maskLayoutSubType "abstract" ;
PROPERTY prCellType "standard" ;
PROPERTY originalViewName "layout" ;
END sky130_fd_sc_hdll__mux2i_1
END LIBRARY