| { |
| "area": 10.0096, |
| "cell_footprint": "or3b", |
| "cell_leakage_power": 0.0, |
| "pg_pin VGND": { |
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| "related_bias_pin": "VNB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "pwell", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "nwell", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
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| "related_bias_pin": "VPB", |
| "voltage_name": "VPWR" |
| }, |
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| "clock": "false", |
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| 0.0281727, |
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| 0.629961, |
| 1.77477, |
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| }, |
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| "related_power_pin": "VPWR", |
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| }, |
| "pin B": { |
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| }, |
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| "related_power_pin": "VPWR", |
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| }, |
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| "clock": "false", |
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| "internal_power": { |
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| }, |
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| }, |
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| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001366 |
| }, |
| "pin X": { |
| "direction": "output", |
| "function": "(A) | (B) | (!C_N)", |
| "internal_power": [ |
| { |
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| ] |
| ] |
| }, |
| "related_pin": "A", |
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| }, |
| "when": "(!B&C_N)" |
| }, |
| { |
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| }, |
| "related_pin": "B", |
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| }, |
| { |
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| "related_pin": "C_N", |
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| } |
| ], |
| "max_capacitance": 0.222598, |
| "max_transition": 4.996099, |
| "power_down_function": "(!VPWR + VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": [ |
| { |
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