{ | |
"area": 12.512, | |
"cell_footprint": "o221a", | |
"cell_leakage_power": 0.0, | |
"pg_pin VGND": { | |
"pg_type": "primary_ground", | |
"related_bias_pin": "VNB", | |
"voltage_name": "VGND" | |
}, | |
"pg_pin VNB": { | |
"pg_type": "pwell", | |
"voltage_name": "VNB" | |
}, | |
"pg_pin VPB": { | |
"pg_type": "nwell", | |
"voltage_name": "VPB" | |
}, | |
"pg_pin VPWR": { | |
"pg_type": "primary_power", | |
"related_bias_pin": "VPB", | |
"voltage_name": "VPWR" | |
}, | |
"pin A1": { | |
"capacitance": 0.002227, | |
"clock": "false", | |
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"fall_capacitance": 0.002074, | |
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0.0230506, | |
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0.122474, | |
0.282311, | |
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"pin A2": { | |
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"pin C1": { | |
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"pin X": { | |
"direction": "output", | |
"function": "(A1&B1&C1) | (A2&B1&C1) | (A1&B2&C1) | (A2&B2&C1)", | |
"internal_power": [ | |
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