| { |
| "area": 12.512, |
| "cell_footprint": "clkmux2", |
| "cell_leakage_power": 0.0002132945, |
| "leakage_power": [ |
| { |
| "value": 0.0002056, |
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| }, |
| { |
| "value": 0.0002605, |
| "when": "!A0&!A1&!S" |
| }, |
| { |
| "value": 0.0001629, |
| "when": "!A0&A1&S" |
| }, |
| { |
| "value": 0.0002162, |
| "when": "!A0&A1&!S" |
| }, |
| { |
| "value": 0.0002466, |
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| }, |
| { |
| "value": 0.0002519, |
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| }, |
| { |
| "value": 0.0001957, |
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| }, |
| { |
| "value": 0.0001669, |
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| } |
| ], |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "pwell", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "nwell", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VPWR" |
| }, |
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| "clock": "false", |
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| "fall_capacitance": 0.0018, |
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| 0.01, |
| 0.0281727, |
| 0.0793701, |
| 0.223607, |
| 0.629961, |
| 1.77477, |
| 4.9999998 |
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| 0.0022977, |
| 0.0022994, |
| 0.0023042, |
| 0.0023178, |
| 0.0023559 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.0281727, |
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| 0.223607, |
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| }, |
| "max_transition": 5.0, |
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| "related_power_pin": "VPWR", |
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| }, |
| "pin A1": { |
| "capacitance": 0.002246, |
| "clock": "false", |
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| "fall_capacitance": 0.002099, |
| "internal_power": { |
| "fall_power power_inputs_1": { |
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| 0.01, |
| 0.0281727, |
| 0.0793701, |
| 0.223607, |
| 0.629961, |
| 1.77477, |
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| 0.0028982, |
| 0.0029582 |
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| }, |
| "rise_power power_inputs_1": { |
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| }, |
| "max_transition": 5.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002392 |
| }, |
| "pin S": { |
| "capacitance": 0.004145, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.003891, |
| "internal_power": { |
| "fall_power power_inputs_1": { |
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| 0.01, |
| 0.0281727, |
| 0.0793701, |
| 0.223607, |
| 0.629961, |
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| 0.0095658, |
| 0.0095361, |
| 0.0094525, |
| 0.0092169 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
| 0.0281727, |
| 0.0793701, |
| 0.223607, |
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| -0.0019, |
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| }, |
| "max_transition": 5.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.004399 |
| }, |
| "pin X": { |
| "direction": "output", |
| "function": "(A0&!S) | (A1&S)", |
| "internal_power": [ |
| { |
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| ] |
| }, |
| "related_pin": "A0", |
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| 0.01, |
| 0.0281727, |
| 0.0793701, |
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| 0.629961, |
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| }, |
| { |
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| [ |
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| [ |
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| }, |
| "related_pin": "A1", |
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| 0.629961, |
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| [ |
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| [ |
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| }, |
| { |
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| 0.01, |
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| 0.0793701, |
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| 1.77477, |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "S", |
| "rise_power power_outputs_1": { |
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| 0.01, |
| 0.0281727, |
| 0.0793701, |
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| 0.629961, |
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| [ |
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| [ |
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| } |
| } |
| ], |
| "max_capacitance": 0.124751, |
| "max_transition": 5.009753, |
| "power_down_function": "(!VPWR + VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": [ |
| { |
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| 0.01, |
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