{
  "area": 30.0288,
  "cell_footprint": "sky130_fd_sc_hdll__sdfxtp",
  "cell_leakage_power": 0.0,
  "ff,IQ,IQ_N": {
    "clocked_on": "CLK",
    "next_state": "(D&!SCE) | (SCD&SCE)"
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  "pg_pin,VGND": {
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    "voltage_name": "VGND"
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  "pg_pin,VNB": {
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    "physical_connection": "device_layer",
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  "pg_pin,VPB": {
    "pg_type": "pwell",
    "physical_connection": "device_layer",
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    "pg_type": "primary_power",
    "related_bias_pin": "VNB",
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      "rise_power,power_inputs_1": {
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        "sdf_cond": "D==1'b0&&SCD==1'b0&&SCE==1'b1",
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        "timing_type": "rising_edge",
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      },
      {
        "cell_fall,del_1_7_7": {
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        "fall_transition,del_1_7_7": {
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        "related_pin": "CLK",
        "sdf_cond": "D==1'b0&&SCD==1'b1&&SCE==1'b0",
        "timing_sense": "negative_unate",
        "timing_type": "rising_edge",
        "when": "(!D&SCD&!SCE)"
      },
      {
        "cell_fall,del_1_7_7": {
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          "values": [
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        },
        "fall_transition,del_1_7_7": {
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          "values": [
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        },
        "related_pin": "CLK",
        "sdf_cond": "D==1'b1&&SCD==1'b0&&SCE==1'b1",
        "timing_sense": "negative_unate",
        "timing_type": "rising_edge",
        "when": "(D&!SCD&SCE)"
      }
    ]
  },
  "pin,SCD": {
    "capacitance": 0.001665,
    "clock": "false",
    "direction": "input",
    "fall_capacitance": 0.001572,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
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        "values": [
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      "rise_power,power_inputs_1": {
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        "values": [
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          -0.0031549
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    },
    "max_transition": 1.5,
    "nextstate_type": "scan_in",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001759,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
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          ],
          "values": [
            [
              0.5207988,
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        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
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          ],
          "index_2": [
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          "values": [
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              -0.0262227,
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        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10.0
      },
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              -0.2213887,
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              -0.115041,
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
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            1.5
          ],
          "values": [
            [
              -0.1371602,
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              -0.0405781,
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10.0
      }
    ]
  },
  "pin,SCE": {
    "capacitance": 0.003271,
    "clock": "false",
    "direction": "input",
    "fall_capacitance": 0.003039,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
          0.01,
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          0.122474,
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        ],
        "values": [
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      },
      "rise_power,power_inputs_1": {
        "index_1": [
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        ],
        "values": [
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    },
    "max_transition": 1.5,
    "nextstate_type": "scan_enable",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.003503,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              0.4609844,
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            [
              0.287498,
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            [
              0.0763164,
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              0.515916,
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            [
              0.3448711,
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            [
              0.1373516,
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10.0
      },
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              -0.2055195,
              -0.3875508,
              -0.7366719
            ],
            [
              -0.0857441,
              -0.2665547,
              -0.6315449
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            [
              0.0900371,
              -0.0932148,
              -0.4557637
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              -0.121291,
              -0.2728047,
              -0.4900899
            ],
            [
              -0.0259297,
              -0.1786641,
              -0.3898457
            ],
            [
              0.0851543,
              -0.063918,
              -0.2763203
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10.0
      }
    ]
  },
  "test_cell": {
    "ff,IQ,IQ_N": {
      "clocked_on": "CLK",
      "next_state": "D"
    },
    "pin,CLK": {
      "direction": "input"
    },
    "pin,D": {
      "direction": "input"
    },
    "pin,Q": {
      "direction": "output",
      "function": "IQ",
      "signal_type": "test_scan_out"
    },
    "pin,SCD": {
      "direction": "input",
      "signal_type": "test_scan_in"
    },
    "pin,SCE": {
      "direction": "input",
      "signal_type": "test_scan_enable"
    }
  }
}