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foss-eda-tools / skywater-pdk / libs / sky130_fd_sc_hdll / 4ccac0c76bfd167ff96a70e24162775d05fd131d / . / cells / sdfstp / sky130_fd_sc_hdll__sdfstp_4__ss_n40C_1v44.lib.json
blob: 2a1fdeb82560acfe7ef9ed5328060bc8e49355df [file] [log] [blame]
{
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"cell_footprint": "sky130_fd_sc_hdll__sdfstp",
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},
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},
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3.7330561,
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6.4164247
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{
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0.0769031,
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]
},
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"clock": "false",
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0.0793701,
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},
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},
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5.0
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0.01,
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0.7013164,
1.8202373,
2.929246
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[
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2.2175762
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},
"related_pin": "CLK",
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[
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},
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},
{
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2.5,
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0.185252,
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[
0.7577617,
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},
"related_pin": "CLK",
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0.01,
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[
0.6698711,
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},
"sim_opt": "runlvl=5 accurate=1",
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"violation_delay_degrade_pct": 10.0
}
]
},
"pin,SCE": {
"capacitance": 0.003196,
"clock": "false",
"direction": "input",
"fall_capacitance": 0.003059,
"internal_power": {
"fall_power,power_inputs_1": {
"index_1": [
0.01,
0.0281727,
0.0793701,
0.223607,
0.629961,
1.77477,
4.9999998
],
"values": [
0.0066006,
0.0067053,
0.0070001,
0.0070002,
0.0070004,
0.007001,
0.0070027
]
},
"rise_power,power_inputs_1": {
"index_1": [
0.01,
0.0281727,
0.0793701,
0.223607,
0.629961,
1.77477,
4.9999998
],
"values": [
0.0005777,
0.0003868,
-0.0001512,
-0.0001663,
-0.0002091,
-0.0003294,
-0.0006683
]
}
},
"max_transition": 5.0,
"nextstate_type": "scan_enable",
"related_ground_pin": "VGND",
"related_power_pin": "VPWR",
"rise_capacitance": 0.003333,
"timing": [
{
"fall_constraint,vio_3_3_1": {
"index_1": [
0.01,
2.5,
5.0
],
"index_2": [
0.01,
2.5,
5.0
],
"values": [
[
1.6627666,
2.7908427,
3.921824
],
[
0.6518779,
1.7726299,
2.9091046
],
[
-0.059792,
1.0591289,
2.1882794
]
]
},
"related_pin": "CLK",
"rise_constraint,vio_3_3_1": {
"index_1": [
0.01,
2.5,
5.0
],
"index_2": [
0.01,
2.5,
5.0
],
"values": [
[
1.6902324,
2.5143534,
3.1198222
],
[
0.6775127,
1.4979717,
2.1071025
],
[
-0.0286641,
0.7917949,
1.3954326
]
]
},
"sim_opt": "runlvl=5 accurate=1",
"timing_type": "setup_rising",
"violation_delay_degrade_pct": 10.0
},
{
"fall_constraint,vio_3_3_1": {
"index_1": [
0.01,
2.5,
5.0
],
"index_2": [
0.01,
2.5,
5.0
],
"values": [
[
-0.3385762,
-1.4611591,
-2.4969257
],
[
0.2108867,
-0.90071,
-1.9914081
],
[
0.8035381,
-0.3245381,
-1.4317158
]
]
},
"related_pin": "CLK",
"rise_constraint,vio_3_3_1": {
"index_1": [
0.01,
2.5,
5.0
],
"index_2": [
0.01,
2.5,
5.0
],
"values": [
[
-0.2543477,
-1.1334004,
-1.8212666
],
[
0.2822978,
-0.5875996,
-1.2846211
],
[
0.7028301,
-0.1688984,
-0.869582
]
]
},
"sim_opt": "runlvl=5 accurate=1",
"timing_type": "hold_rising",
"violation_delay_degrade_pct": 10.0
}
]
},
"pin,SET_B": {
"capacitance": 0.002953,
"clock": "false",
"direction": "input",
"fall_capacitance": 0.002942,
"internal_power": {
"fall_power,power_inputs_1": {
"index_1": [
0.01,
0.0281727,
0.0793701,
0.223607,
0.629961,
1.77477,
4.9999998
],
"values": [
0.0029357,
0.0030488,
0.0033674,
0.0033702,
0.0033779,
0.0033998,
0.0034614
]
},
"rise_power,power_inputs_1": {
"index_1": [
0.01,
0.0281727,
0.0793701,
0.223607,
0.629961,
1.77477,
4.9999998
],
"values": [
0.0004101,
0.0002587,
-0.0001681,
-0.000175,
-0.0001943,
-0.0002488,
-0.0004022
]
}
},
"max_transition": 5.0,
"related_ground_pin": "VGND",
"related_power_pin": "VPWR",
"rise_capacitance": 0.003033,
"timing": [
{
"related_pin": "CLK",
"rise_constraint,vio_3_3_1": {
"index_1": [
0.01,
2.5,
5.0
],
"index_2": [
0.01,
2.5,
5.0
],
"values": [
[
-0.5033711,
0.1138408,
0.565501
],
[
-1.4483418,
-0.8421162,
-0.388625
],
[
-2.1801533,
-1.5720966,
-1.1240987
]
]
},
"sim_opt": "runlvl=5 accurate=1",
"timing_type": "recovery_rising",
"violation_delay_degrade_pct": 10.0
},
{
"related_pin": "CLK",
"rise_constraint,vio_3_3_1": {
"index_1": [
0.01,
2.5,
5.0
],
"index_2": [
0.01,
2.5,
5.0
],
"values": [
[
0.538499,
-0.0677266,
-0.5157246
],
[
1.4706523,
0.8699199,
0.4164287
],
[
2.1951397,
1.5980694,
1.1519024
]
]
},
"sim_opt": "runlvl=5 accurate=1",
"timing_type": "removal_rising",
"violation_delay_degrade_pct": 10.0
},
{
"fall_constraint,constraint_3_0_1": {
"index_1": [
0.01,
2.5,
5.0
],
"values": [
0.8886157,
3.2323744,
6.2519998
]
},
"related_pin": "SET_B",
"sim_opt": "runlvl=5 accurate=1",
"timing_type": "min_pulse_width",
"violation_delay_degrade_pct": 10.0
}
]
},
"test_cell": {
"ff,IQ,IQ_N": {
"clocked_on": "CLK",
"next_state": "D",
"preset": "!SET_B"
},
"pin,CLK": {
"direction": "input"
},
"pin,D": {
"direction": "input"
},
"pin,Q": {
"direction": "output",
"function": "IQ",
"signal_type": "test_scan_out"
},
"pin,SCD": {
"direction": "input",
"signal_type": "test_scan_in"
},
"pin,SCE": {
"direction": "input",
"signal_type": "test_scan_enable"
},
"pin,SET_B": {
"direction": "input"
}
}
}