{
  "area": 25.024,
  "cell_footprint": "sky130_fd_sc_hdll__sdlclkp",
  "cell_leakage_power": 0.0,
  "clock_gating_integrated_cell": "latch_posedge_precontrol",
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    "pg_type": "primary_ground",
    "related_bias_pin": "VNB",
    "voltage_name": "VGND"
  },
  "pg_pin,VNB": {
    "pg_type": "pwell",
    "voltage_name": "VNB"
  },
  "pg_pin,VPB": {
    "pg_type": "nwell",
    "voltage_name": "VPB"
  },
  "pg_pin,VPWR": {
    "pg_type": "primary_power",
    "related_bias_pin": "VPB",
    "voltage_name": "VPWR"
  },
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    "capacitance": 0.003562,
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    "clock_gate_clock_pin": "true",
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      "rise_power,power_inputs_1": {
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    "max_transition": 5.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.003863,
    "timing": {
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        "values": [
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      "related_pin": "CLK",
      "sim_opt": "runlvl=5 accurate=1",
      "timing_type": "min_pulse_width",
      "violation_delay_degrade_pct": 10.0
    }
  },
  "pin,GATE": {
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    "clock": "false",
    "clock_gate_enable_pin": "true",
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    "fall_capacitance": 0.001456,
    "internal_power": {
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      "rise_power,power_inputs_1": {
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    },
    "max_transition": 5.0,
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        "related_pin": "CLK",
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          "index_2": [
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        "sim_opt": "runlvl=5 accurate=1",
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        "violation_delay_degrade_pct": 10.0
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      {
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        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
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          ],
          "index_2": [
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        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10.0
      }
    ]
  },
  "pin,GCLK": {
    "clock_gate_out_pin": "true",
    "direction": "output",
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        "related_pin": "CLK",
        "rise_power,power_outputs_1": {
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        "when": "(!GATE&SCE)"
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      {
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        "related_pin": "CLK",
        "rise_power,power_outputs_1": {
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        "when": "(GATE&!SCE)"
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      {
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        "when": "(GATE&SCE)"
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      {
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        "related_pin": "CLK",
        "rise_power,scalar": {
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        "when": "(!GATE&!SCE)"
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    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "state_function": "(CLK*M0)",
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            0.393687
          ],
          "values": [
            [
              0.1022724,
              0.106281,
              0.1188053,
              0.1472363,
              0.2241718,
              0.4371674,
              1.127641
            ],
            [
              0.1026447,
              0.1070154,
              0.1176473,
              0.1469639,
              0.222128,
              0.437588,
              1.1280511
            ],
            [
              0.1029058,
              0.1064774,
              0.1190446,
              0.1474952,
              0.2243977,
              0.4373938,
              1.1277907
            ],
            [
              0.1025146,
              0.1063351,
              0.1188184,
              0.1473707,
              0.2226903,
              0.435571,
              1.1273817
            ],
            [
              0.102944,
              0.106588,
              0.1177599,
              0.1476213,
              0.2248683,
              0.4367942,
              1.1278269
            ],
            [
              0.1023425,
              0.1065346,
              0.1192051,
              0.148032,
              0.2245795,
              0.437277,
              1.1272493
            ],
            [
              0.1295781,
              0.1321517,
              0.1443156,
              0.1716916,
              0.2396779,
              0.4419862,
              1.1268972
            ]
          ]
        },
        "related_pin": "CLK",
        "sdf_cond": "GATE==1'b0&&SCE==1'b0",
        "timing_sense": "positive_unate",
        "timing_type": "combinational_fall",
        "when": "(!GATE&!SCE)"
      }
    ]
  },
  "pin,M0": {
    "direction": "internal",
    "internal_node": "M0",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR"
  },
  "pin,SCE": {
    "capacitance": 0.001595,
    "clock": "false",
    "clock_gate_test_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.001489,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0281727,
          0.0793701,
          0.223607,
          0.629961,
          1.77477,
          4.9999998
        ],
        "values": [
          0.0046843,
          0.0045496,
          0.0041702,
          0.0045426,
          0.0055918,
          0.0085478,
          0.0168757
        ]
      },
      "rise_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0281727,
          0.0793701,
          0.223607,
          0.629961,
          1.77477,
          4.9999998
        ],
        "values": [
          0.0098346,
          0.0095242,
          0.0086498,
          0.0086913,
          0.0088083,
          0.009138,
          0.0100668
        ]
      }
    },
    "max_transition": 5.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001701,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              1.0823223,
              2.1847637,
              3.2699688
            ],
            [
              0.1959453,
              1.2947246,
              2.3799296
            ],
            [
              -0.4168477,
              0.6782695,
              1.7634746
            ]
          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              0.4011699,
              1.2857158,
              1.9937237
            ],
            [
              -0.3149189,
              0.5586406,
              1.2483379
            ],
            [
              -0.728127,
              0.1289531,
              0.8094951
            ]
          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10.0
      },
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              -1.0417011,
              -2.1404804,
              -3.2311786
            ],
            [
              -0.1644795,
              -1.2595967,
              -2.3448019
            ],
            [
              0.4464824,
              -0.6486348,
              -1.7301777
            ]
          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              -0.164626,
              -1.0345234,
              -1.7187276
            ],
            [
              0.388499,
              -0.46675,
              -1.1344746
            ],
            [
              0.799876,
              -0.0443867,
              -0.7066182
            ]
          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10.0
      }
    ]
  },
  "statetable,CLK GATE SCE,M0": {
    "table": [
      "L L L : - : L",
      "L L H : - : H",
      "L H L : - : H",
      "L H H : - : H",
      "H - - : - : N"
    ]
  }
}